GB1036165A - Improvements in or relating to semiconductor devices - Google Patents

Improvements in or relating to semiconductor devices

Info

Publication number
GB1036165A
GB1036165A GB3786/64A GB378664A GB1036165A GB 1036165 A GB1036165 A GB 1036165A GB 3786/64 A GB3786/64 A GB 3786/64A GB 378664 A GB378664 A GB 378664A GB 1036165 A GB1036165 A GB 1036165A
Authority
GB
United Kingdom
Prior art keywords
silicon
header
transistor
strips
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3786/64A
Inventor
John Hill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB20201/62A external-priority patent/GB1010111A/en
Priority claimed from GB36013/62A external-priority patent/GB1044689A/en
Priority claimed from GB39650/62A external-priority patent/GB1023531A/en
Priority claimed from DEST19973A external-priority patent/DE1179280B/en
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to US421178A priority Critical patent/US3324357A/en
Priority to DE1514736A priority patent/DE1514736C3/en
Priority to DE19651514739 priority patent/DE1514739A1/en
Priority to BE659002D priority patent/BE659002A/xx
Priority to NL6501142A priority patent/NL6501142A/xx
Priority to NL6501141A priority patent/NL6501141A/xx
Priority to FR3688A priority patent/FR1427264A/en
Priority to BE659001D priority patent/BE659001A/xx
Priority to DE19651514742 priority patent/DE1514742A1/en
Priority to BE659624D priority patent/BE659624A/xx
Priority to NL6501745A priority patent/NL6501745A/xx
Priority to FR8137A priority patent/FR87924E/en
Publication of GB1036165A publication Critical patent/GB1036165A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/041Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction having no base used as a mounting for the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1,036,165. Semi-conductor devices. STANDARD TELEPHONES & CABLES Ltd. Jan. 29, 1964, No. 3786/64. Addition to 1,023,531. Heading H1K. A device comprising a semi-conductor wafer with at least one contact comprising a layer grading outwards from an adherent to a softsolderable metal and extending from a semiconductor zone on one face over an insulating layer thereon has its contacts soldered to the lead wires of a header. In an embodiment, a planar transistor, Fig. 1, made in multiple by successive diffusions into a silicon wafer through apertures formed in a surface oxide layer by photo-resist etching techniques, is provided with an overall film of aluminium. This is removed, except from areas of the emitter, base and collector zones exposed through apertures in the oxide film, by photo-resist etching techniques. An overall film graded from chromium beneath to gold above is then deposited as described in Specification 1,010,111 and reduced to strips 9, 10, 11 in contact through the aluminium with the collector, base and emitter zones respectively. The transistor is dipped in flux and then in a lead-tin eutectic or a commercial silver solder to tin the strips which are next soldered to the flattened ends of wires 13 extending from header 12 (Fig. 4). Alternatively, the wires terminate on the header surface in graded chromium-gold films to which the strips are soldered. The transistor is sealed by welding a top cap to the header flange. Prior to or as alternative to this an opaque insulating coating may be provided, e.g. by transfer moulding. Suitable coating materials are rubber, nylon, polypropylene, and epoxy and silicon resins, incorporating alumina or glass as fillers to match the expansion coefficient to that of silicon. Successive coatings of different materials may be applied, and to assist cooling a block of copper may be embedded in the coating. In an alternative method of making the transistor, the aluminium contacts are replaced by nickel or omitted. If the diffused regions are formed in a high resistivity layer epitaxially grown on a heavily doped silicon wafer, the collector contact may be deposited in a groove cut through the oxide and epitaxial layers. Application of the invention to silicon controlled rectifiers and diodes and to germanium devices incorporating a silicon oxide coating is also suggested.
GB3786/64A 1962-05-25 1964-01-29 Improvements in or relating to semiconductor devices Expired GB1036165A (en)

Priority Applications (12)

Application Number Priority Date Filing Date Title
US421178A US3324357A (en) 1964-01-29 1964-12-28 Multi-terminal semiconductor device having active element directly mounted on terminal leads
DE1514736A DE1514736C3 (en) 1964-01-29 1965-01-21 Method for manufacturing a plurality of semiconductor components
DE19651514739 DE1514739A1 (en) 1962-05-25 1965-01-27 Electric semiconductor device
BE659001D BE659001A (en) 1962-05-25 1965-01-29
FR3688A FR1427264A (en) 1964-01-29 1965-01-29 Semiconductor device enhancements
NL6501141A NL6501141A (en) 1964-01-29 1965-01-29
NL6501142A NL6501142A (en) 1964-01-29 1965-01-29
BE659002D BE659002A (en) 1962-05-25 1965-01-29
DE19651514742 DE1514742A1 (en) 1964-01-29 1965-02-06 Semiconductor device
BE659624D BE659624A (en) 1964-01-29 1965-02-12
NL6501745A NL6501745A (en) 1964-01-29 1965-02-12
FR8137A FR87924E (en) 1964-01-29 1965-03-05 Semiconductor device enhancements

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
GB20201/62A GB1010111A (en) 1962-05-25 1962-05-25 Vapour deposition of metallic films
GB36013/62A GB1044689A (en) 1962-09-21 1962-09-21 Improvements in or relating to mountings for semi-conductor devices
GB39650/62A GB1023531A (en) 1962-05-25 1962-10-19 Improvements in or relating to semiconductor devices
DEST19973A DE1179280B (en) 1962-11-09 1962-11-09 Process for the production of solderable contact points
GB48863/62A GB1024216A (en) 1962-05-25 1962-12-28 Improvements in or relating to circuit modules including semiconductor devices
GB9636/64A GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices

Publications (1)

Publication Number Publication Date
GB1036165A true GB1036165A (en) 1966-07-13

Family

ID=27544935

Family Applications (2)

Application Number Title Priority Date Filing Date
GB3786/64A Expired GB1036165A (en) 1962-05-25 1964-01-29 Improvements in or relating to semiconductor devices
GB9636/64A Expired GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB9636/64A Expired GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices

Country Status (2)

Country Link
BE (1) BE660746A (en)
GB (2) GB1036165A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2545653A1 (en) * 1983-05-04 1984-11-09 Pichot Michel Method and device for encapsulating integrated circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2545653A1 (en) * 1983-05-04 1984-11-09 Pichot Michel Method and device for encapsulating integrated circuits

Also Published As

Publication number Publication date
BE660746A (en) 1965-09-08
GB1036167A (en) 1966-07-13

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