GB0506134D0 - Integrated circuit comprising an SSTL (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an SSTL operation - Google Patents

Integrated circuit comprising an SSTL (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an SSTL operation

Info

Publication number
GB0506134D0
GB0506134D0 GBGB0506134.6A GB0506134A GB0506134D0 GB 0506134 D0 GB0506134 D0 GB 0506134D0 GB 0506134 A GB0506134 A GB 0506134A GB 0506134 D0 GB0506134 D0 GB 0506134D0
Authority
GB
United Kingdom
Prior art keywords
sstl
power supply
integrated circuit
regulated power
driver stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB0506134.6A
Other versions
GB2408642A (en
GB2408642B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/247,127 external-priority patent/US6734716B2/en
Priority claimed from US10/247,082 external-priority patent/US6873503B2/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of GB0506134D0 publication Critical patent/GB0506134D0/en
Publication of GB2408642A publication Critical patent/GB2408642A/en
Application granted granted Critical
Publication of GB2408642B publication Critical patent/GB2408642B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
GB0506134A 2002-09-19 2003-08-08 SSTL pre-driver design using regulated power supply Expired - Lifetime GB2408642B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/247,127 US6734716B2 (en) 2002-09-19 2002-09-19 SSTL pull-down pre-driver design using regulated power supply
US10/247,082 US6873503B2 (en) 2002-09-19 2002-09-19 SSTL pull-up pre-driver design using regulated power supply
PCT/US2003/024817 WO2004027995A2 (en) 2002-09-19 2003-08-08 Integrated circuit comprising an sstl (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an sstl operation

Publications (3)

Publication Number Publication Date
GB0506134D0 true GB0506134D0 (en) 2005-05-04
GB2408642A GB2408642A (en) 2005-06-01
GB2408642B GB2408642B (en) 2006-08-09

Family

ID=32033231

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0506134A Expired - Lifetime GB2408642B (en) 2002-09-19 2003-08-08 SSTL pre-driver design using regulated power supply

Country Status (3)

Country Link
AU (1) AU2003259060A1 (en)
GB (1) GB2408642B (en)
WO (1) WO2004027995A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8148962B2 (en) 2009-05-12 2012-04-03 Sandisk Il Ltd. Transient load voltage regulator

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4006491A (en) * 1975-05-15 1977-02-01 Motorola, Inc. Integrated circuit having internal main supply voltage regulator
US4430582A (en) * 1981-11-16 1984-02-07 National Semiconductor Corporation Fast CMOS buffer for TTL input levels
JPH03214659A (en) * 1990-01-18 1991-09-19 Mitsubishi Electric Corp Setting element of supply voltage of field effect type semiconductor device
JPH04360312A (en) * 1991-06-06 1992-12-14 Hitachi Ltd Semiconductor integrated circuit device and signal processing unit
KR100392556B1 (en) * 1994-01-31 2003-11-12 주식회사 하이닉스반도체 Input buffer for cmos circuit
US6023174A (en) * 1997-07-11 2000-02-08 Vanguard International Semiconductor Corporation Adjustable, full CMOS input buffer for TTL, CMOS, or low swing input protocols
US6087885A (en) * 1997-09-11 2000-07-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device allowing fast and stable transmission of signals
US5939937A (en) * 1997-09-29 1999-08-17 Siemens Aktiengesellschaft Constant current CMOS output driver circuit with dual gate transistor devices
KR100327658B1 (en) * 1998-06-29 2002-08-13 주식회사 하이닉스반도체 Data input buffer

Also Published As

Publication number Publication date
AU2003259060A1 (en) 2004-04-08
GB2408642A (en) 2005-06-01
WO2004027995A3 (en) 2004-06-17
WO2004027995A2 (en) 2004-04-01
AU2003259060A8 (en) 2004-04-08
GB2408642B (en) 2006-08-09

Similar Documents

Publication Publication Date Title
LT1595324T (en) Circuit and method of operation for an electrical power supply
GB2395382B (en) Power amplification circuit and method for supplying power at a plurality of desired power output levels
AU2003223746A1 (en) Apparatus and method for managing integrated circuit designs
AU2439999A (en) Method of designing power supply circuit and semiconductor chip
AU2003286727A1 (en) Method and apparatus for monitoring integrated circuit fabrication
AU2003288446A1 (en) Power integrated circuits
AU2003247556A1 (en) An integrated controller, method of operation thereof and power supply employing the same
AU2003250688A8 (en) Power down system and method for integrated circuits
AU2003216223A1 (en) Universal uninterruptible power supply input circuitry and methods for configuring same
AU2003225792A1 (en) Integrated circuit device and method therefor
WO2004061634A3 (en) Manufacture and operation of integrated circuit
AU2002303263A1 (en) Method and apparatus for controlling current demand in an integrated circuit
IL150007A0 (en) Efficient supply enhancement circuitry for power amplifiers
EP1548694A4 (en) Drive circuit and drive method
TWI368227B (en) Integrated circuit power management for reducing leakage current in circuit arrays and method therefor
EP1671339A4 (en) Method and apparatus for performing power routing on a voltage island within an integrated circuit chip
GB2394088B (en) Data output circuit and data output method
AU2003207359A1 (en) Uninterruptible power supply apparatus and method
GB0229878D0 (en) Circuit and method for supplying an electrical a.c. load
EP1658996A4 (en) Speech-message delivery sheet, its manufacturing method, and power supply circuit
EP1471643A4 (en) Logical operation circuit and logical operation method
AU2003259060A8 (en) Integrated circuit comprising an sstl (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an sstl operation
GB2388691B (en) Memory control chip control method and control circuit
AU2003254528A1 (en) Power supply component assembly on a printed circuit and method for obtaining same
EP1471644A4 (en) Logical operation circuit and logical operation method

Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20230807