FR2973943B1 - Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés - Google Patents

Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés

Info

Publication number
FR2973943B1
FR2973943B1 FR1153080A FR1153080A FR2973943B1 FR 2973943 B1 FR2973943 B1 FR 2973943B1 FR 1153080 A FR1153080 A FR 1153080A FR 1153080 A FR1153080 A FR 1153080A FR 2973943 B1 FR2973943 B1 FR 2973943B1
Authority
FR
France
Prior art keywords
semiconductor structures
supported
methods
treated
common substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1153080A
Other languages
English (en)
Other versions
FR2973943A1 (fr
Inventor
Mariam Sadaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1153080A priority Critical patent/FR2973943B1/fr
Priority to TW101104599A priority patent/TWI517226B/zh
Priority to CN201210093008.8A priority patent/CN102738026B/zh
Priority to KR1020120033825A priority patent/KR101341373B1/ko
Publication of FR2973943A1 publication Critical patent/FR2973943A1/fr
Application granted granted Critical
Publication of FR2973943B1 publication Critical patent/FR2973943B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
FR1153080A 2011-03-31 2011-04-08 Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés Expired - Fee Related FR2973943B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1153080A FR2973943B1 (fr) 2011-04-08 2011-04-08 Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés
TW101104599A TWI517226B (zh) 2011-03-31 2012-02-13 形成包含由一共同底材承載之兩個或以上已處理半導體構造之黏附半導體構造之方法及應用此等方法所形成之半導體構造
CN201210093008.8A CN102738026B (zh) 2011-03-31 2012-03-31 形成接合半导体结构的方法及用该方法形成的半导体结构
KR1020120033825A KR101341373B1 (ko) 2011-03-31 2012-04-02 공통의 기판에 의해 지지된 2 개 이상의 가공 반도체 구조를 포함하는 접합 반도체 구조의 형성 방법, 및 이러한 방법에 의해 형성된 반도체 구조

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1153080A FR2973943B1 (fr) 2011-04-08 2011-04-08 Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés

Publications (2)

Publication Number Publication Date
FR2973943A1 FR2973943A1 (fr) 2012-10-12
FR2973943B1 true FR2973943B1 (fr) 2013-04-05

Family

ID=44548950

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1153080A Expired - Fee Related FR2973943B1 (fr) 2011-03-31 2011-04-08 Procédés de formation de structures semi-conductrices collées comprenant deux structures semi-conductrices traitées ou plus supportées par un substrat commun, et structures semi-conductrices formées par ces procédés

Country Status (1)

Country Link
FR (1) FR2973943B1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19853703A1 (de) * 1998-11-20 2000-05-25 Giesecke & Devrient Gmbh Verfahren zur Herstellung eines beidseitig prozessierten integrierten Schaltkreises
US7098070B2 (en) * 2004-11-16 2006-08-29 International Business Machines Corporation Device and method for fabricating double-sided SOI wafer scale package with through via connections
US7772701B2 (en) * 2006-06-07 2010-08-10 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit having improved interconnect structure
FR2910704A1 (fr) * 2007-04-05 2008-06-27 Commissariat Energie Atomique Procede de realisation d'un dispositif a circuit integre interconnecte
JPWO2010047228A1 (ja) * 2008-10-21 2012-03-22 日本電気株式会社 配線基板およびその製造方法
US8319325B2 (en) * 2009-06-12 2012-11-27 Qualcomm Incorporated Intra-die routing using back side redistribution layer and associated method

Also Published As

Publication number Publication date
FR2973943A1 (fr) 2012-10-12

Similar Documents

Publication Publication Date Title
EP2656388A4 (fr) Couche riche en pièges pour dispositifs à semi-conducteurs
ITAN20120084A1 (it) Dispositivo per la corretta posa in opera di piastrelle da pavimentazione.
FR2973159B1 (fr) Procede de fabrication d'un substrat de base
BR112013015808A2 (pt) composição de revestimento, método de revestimento de um substrato de alimentos ou bebidas e substrato de alimentos ou bebidas
EP2704182A4 (fr) Dispositif de liaison de substrats, dispositif de support de substrats, procédé de liaison de substrats, procédé de support de substrats, dispositif semi-conducteur à couches multiples et substrat couvert
EP2279517A4 (fr) Procédés destinés à former des structures supportées par des substrats semi-conducteurs
HK1193641A1 (en) Method for building structures, particularly passages under operating railways or the like
WO2012057517A3 (fr) Dispositif à semi-conducteur composite et procédé de fabrication d'un semi-conducteur composite
EP2908330A4 (fr) Substrat composite à nitrure du groupe iii, procédé pour sa fabrication et procédé de fabrication d'un dispositif semi-conducteur à nitrure du groupe iii
GB2509683B (en) Flattened substrate surface for substrate bonding
FI20085113A0 (fi) Menetelmä grafiinirakenteiden valmistamiseksi alustoille
EP2672507A4 (fr) Procédé de fabrication de surface lié, substrat lié, procédé de liaison de substrat, dispositif de fabrication de surface de liaison et ensemble substrat
EP2763513A4 (fr) Substrat de câblage, substrat à composant inclus et structure de boîtier
WO2014063670A3 (fr) Procédé de fabrication d'une couche nanoporeuse sur un substrat
GB2497664B (en) Substrates for semiconductor devices
FR2981871B1 (fr) Procede de polissage d'un substrat
EP2856502A4 (fr) Substrat de boîtier de semi-conducteurs, système de boîtier utilisant un tel substrat et son procédé de fabrication
EP2672510A4 (fr) Substrat semi-conducteur, dispositif semi-conducteur, et procédé de production de substrat semi-conducteur
EP2856501A4 (fr) Substrat de conditionnement semi-conducteur, système de conditionnement l'utilisant et son procédé de fabrication
FR2990951B1 (fr) Procede et installation de preparation d'un substrat de methanisation
FI20115966A0 (fi) Menetelmä piisubstraatin elinajan parantamiseksi
FR2987935B1 (fr) Procede d'amincissement de la couche active de silicium d'un substrat du type "silicium sur isolant" (soi).
SG2014014716A (en) Substrate composite, method and device for bonding of substrates
EP2693509A4 (fr) Substrat, son procédé de fabrication et dispositif électroluminescent organique l'utilisant
ITVI20110084A1 (it) Macchina e metodo per la realizzazione di sottofondi per pavimenti

Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20130109

PLFP Fee payment

Year of fee payment: 6

ST Notification of lapse

Effective date: 20171229