FR2964788B1 - Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant - Google Patents

Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant

Info

Publication number
FR2964788B1
FR2964788B1 FR1057211A FR1057211A FR2964788B1 FR 2964788 B1 FR2964788 B1 FR 2964788B1 FR 1057211 A FR1057211 A FR 1057211A FR 1057211 A FR1057211 A FR 1057211A FR 2964788 B1 FR2964788 B1 FR 2964788B1
Authority
FR
France
Prior art keywords
substrate
processing
determined wavelength
light flow
corresponding substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1057211A
Other languages
English (en)
French (fr)
Other versions
FR2964788A1 (fr
Inventor
Michel Bruel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR1057211A priority Critical patent/FR2964788B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to CN2011800433924A priority patent/CN103201825A/zh
Priority to EP11751609.6A priority patent/EP2614519B1/en
Priority to US13/818,235 priority patent/US9190314B2/en
Priority to PCT/EP2011/065259 priority patent/WO2012031998A1/en
Priority to JP2013527562A priority patent/JP5952281B2/ja
Priority to KR1020137005906A priority patent/KR101918166B1/ko
Publication of FR2964788A1 publication Critical patent/FR2964788A1/fr
Application granted granted Critical
Publication of FR2964788B1 publication Critical patent/FR2964788B1/fr
Priority to US14/932,349 priority patent/US9564496B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/268Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10P34/42
    • H10P50/00
    • H10P54/00
    • H10P95/11

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Laser Beam Processing (AREA)
FR1057211A 2010-09-10 2010-09-10 Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant Expired - Fee Related FR2964788B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR1057211A FR2964788B1 (fr) 2010-09-10 2010-09-10 Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant
EP11751609.6A EP2614519B1 (en) 2010-09-10 2011-09-05 Process for treating a substrate using a luminous flux of determined wavelength
US13/818,235 US9190314B2 (en) 2010-09-10 2011-09-05 Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate
PCT/EP2011/065259 WO2012031998A1 (en) 2010-09-10 2011-09-05 Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate
CN2011800433924A CN103201825A (zh) 2010-09-10 2011-09-05 应用确定波长的光通量处理衬底的工艺以及相应衬底
JP2013527562A JP5952281B2 (ja) 2010-09-10 2011-09-20 特定波長の光束を用いて基板を処理する方法および対応する基板
KR1020137005906A KR101918166B1 (ko) 2010-09-10 2011-09-20 결정된 파장의 광속을 이용하여 기판을 처리하기 위한 프로세스 및 대응하는 기판
US14/932,349 US9564496B2 (en) 2010-09-10 2015-11-04 Process for treating a substrate using a luminous flux of determined wavelength, and corresponding substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1057211A FR2964788B1 (fr) 2010-09-10 2010-09-10 Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant

Publications (2)

Publication Number Publication Date
FR2964788A1 FR2964788A1 (fr) 2012-03-16
FR2964788B1 true FR2964788B1 (fr) 2015-05-15

Family

ID=43920828

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1057211A Expired - Fee Related FR2964788B1 (fr) 2010-09-10 2010-09-10 Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant

Country Status (7)

Country Link
US (2) US9190314B2 (enExample)
EP (1) EP2614519B1 (enExample)
JP (1) JP5952281B2 (enExample)
KR (1) KR101918166B1 (enExample)
CN (1) CN103201825A (enExample)
FR (1) FR2964788B1 (enExample)
WO (1) WO2012031998A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2964788B1 (fr) 2010-09-10 2015-05-15 Soitec Silicon On Insulator Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant
FR2978600B1 (fr) 2011-07-25 2014-02-07 Soitec Silicon On Insulator Procede et dispositif de fabrication de couche de materiau semi-conducteur

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR757986A (fr) 1932-07-04 1934-01-05 Thomson Houston Comp Francaise Perfectionnements aux tubes électroniques et à leurs circuits
US4234356A (en) * 1979-06-01 1980-11-18 Bell Telephone Laboratories, Incorporated Dual wavelength optical annealing of materials
US4456490A (en) * 1983-03-09 1984-06-26 Westinghouse Electric Corp. Laser annealing of MIS devices by back surface laser treatment
JP2008135436A (ja) * 2006-11-27 2008-06-12 Seiko Epson Corp 剥離方法、半導体デバイス及び電子機器
JP5286684B2 (ja) * 2007-03-28 2013-09-11 セイコーエプソン株式会社 薄膜層の剥離方法、薄膜デバイスの転写方法
FR2921752B1 (fr) * 2007-10-01 2009-11-13 Aplinov Procede de chauffage d'une plaque par un flux lumineux.
FR2938116B1 (fr) * 2008-11-04 2011-03-11 Aplinov Procede et dispositif de chauffage d'une couche d'une plaque par amorcage et flux lumineux.
FR2964788B1 (fr) 2010-09-10 2015-05-15 Soitec Silicon On Insulator Procédé de traitement d'un substrat au moyen d'un flux lumineux de longueur d'onde déterminée, et substrat correspondant

Also Published As

Publication number Publication date
JP2013541197A (ja) 2013-11-07
WO2012031998A1 (en) 2012-03-15
JP5952281B2 (ja) 2016-07-13
KR101918166B1 (ko) 2018-11-13
KR20140019281A (ko) 2014-02-14
US20130154065A1 (en) 2013-06-20
US9190314B2 (en) 2015-11-17
CN103201825A (zh) 2013-07-10
FR2964788A1 (fr) 2012-03-16
EP2614519A1 (en) 2013-07-17
US20160056247A1 (en) 2016-02-25
EP2614519B1 (en) 2015-07-01
US9564496B2 (en) 2017-02-07

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Legal Events

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Owner name: SOITEC, FR

Effective date: 20120423

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Year of fee payment: 7

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