FR2855627B1 - Circuit integre et procede pour le faire fonctionner - Google Patents
Circuit integre et procede pour le faire fonctionnerInfo
- Publication number
- FR2855627B1 FR2855627B1 FR0404740A FR0404740A FR2855627B1 FR 2855627 B1 FR2855627 B1 FR 2855627B1 FR 0404740 A FR0404740 A FR 0404740A FR 0404740 A FR0404740 A FR 0404740A FR 2855627 B1 FR2855627 B1 FR 2855627B1
- Authority
- FR
- France
- Prior art keywords
- operating
- integrated circuit
- integrated
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
- G06F5/015—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Storage Device Security (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10324049A DE10324049B4 (de) | 2003-05-27 | 2003-05-27 | Integrierte Schaltung und Verfahren zum Betreiben der integrierten Schaltung |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2855627A1 FR2855627A1 (fr) | 2004-12-03 |
FR2855627B1 true FR2855627B1 (fr) | 2007-08-10 |
Family
ID=33426763
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0404740A Expired - Fee Related FR2855627B1 (fr) | 2003-05-27 | 2004-05-04 | Circuit integre et procede pour le faire fonctionner |
Country Status (4)
Country | Link |
---|---|
US (1) | US7583129B2 (fr) |
JP (1) | JP4095578B2 (fr) |
DE (1) | DE10324049B4 (fr) |
FR (1) | FR2855627B1 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2880217A1 (fr) | 2004-11-03 | 2006-06-30 | Infineon Technologies Ag | Montage a mode de securite et a mode d'economie d'energie. |
DE102005001484A1 (de) * | 2005-01-12 | 2006-03-23 | Infineon Technologies Ag | Schaltungsanordnung zur Verarbeitung eines Dual-Rail-Signals |
JP4935229B2 (ja) * | 2006-08-02 | 2012-05-23 | ソニー株式会社 | 演算処理装置、および演算処理制御方法、並びにコンピュータ・プログラム |
FR2929470B1 (fr) * | 2008-03-25 | 2010-04-30 | Groupe Ecoles Telecomm | Procede de protection de circuit de cryptographie programmable, et circuit protege par un tel procede |
US8943375B2 (en) * | 2012-08-08 | 2015-01-27 | Oracle International Corporation | Combo static flop with full test |
KR101996474B1 (ko) * | 2013-04-11 | 2019-07-05 | 에스케이하이닉스 주식회사 | 멀티 칩 패키지 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2752839B2 (ja) * | 1992-04-14 | 1998-05-18 | シャープ株式会社 | 複合論理回路 |
US5399921A (en) * | 1993-12-14 | 1995-03-21 | Dobbelaere; Ivo J. | Dynamic complementary pass-transistor logic circuit |
EP0669620B1 (fr) * | 1994-02-25 | 2001-10-24 | Kabushiki Kaisha Toshiba | Multiplexeur |
US5646558A (en) * | 1995-09-27 | 1997-07-08 | Intel Corporation | Plurality of distinct multiplexers that operate as a single multiplexer |
US5706323A (en) * | 1996-03-01 | 1998-01-06 | Hewlett-Packard Company | Dynamic 1-of-2N logic encoding |
JP3884809B2 (ja) | 1997-01-20 | 2007-02-21 | 株式会社日立製作所 | ディジタルべき乗演算装置及びそれを用いたグラフィックスシステム |
US6008670A (en) * | 1997-08-19 | 1999-12-28 | Hewlett-Packard | Differential CMOS logic family |
US6510518B1 (en) | 1998-06-03 | 2003-01-21 | Cryptography Research, Inc. | Balanced cryptographic computational method and apparatus for leak minimizational in smartcards and other cryptosystems |
JP4140875B2 (ja) | 1999-05-17 | 2008-08-27 | 株式会社東北テクノアーチ | 2線式電流モード回路 |
US6822976B1 (en) * | 1999-11-03 | 2004-11-23 | Intel Corporation | Method and apparatus for high throughput multiplexing of data |
DE10044837C1 (de) * | 2000-09-11 | 2001-09-13 | Infineon Technologies Ag | Schaltungsanordnung und Verfahren zum Detektieren eines unerwünschten Angriffs auf eine integrierte Schaltung |
JP2003018143A (ja) | 2001-06-28 | 2003-01-17 | Mitsubishi Electric Corp | 情報処理装置 |
DE10149585C2 (de) * | 2001-10-08 | 2003-11-20 | Infineon Technologies Ag | Integrierbare, steuerbare Verzögerungseinrichtung, Verwendung einer Verzögerungseinrichtung sowie Verfahren zum Betrieb einer Verzögerungseinrichtung |
US6597232B1 (en) * | 2002-03-28 | 2003-07-22 | Emc Corporation | Data storage having environmental communication module (ECM) |
JP3819872B2 (ja) | 2003-05-23 | 2006-09-13 | 株式会社東芝 | 論理演算装置 |
-
2003
- 2003-05-27 DE DE10324049A patent/DE10324049B4/de not_active Expired - Fee Related
-
2004
- 2004-05-04 FR FR0404740A patent/FR2855627B1/fr not_active Expired - Fee Related
- 2004-05-27 US US10/857,616 patent/US7583129B2/en not_active Expired - Fee Related
- 2004-05-27 JP JP2004158363A patent/JP4095578B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE10324049B4 (de) | 2006-10-26 |
US7583129B2 (en) | 2009-09-01 |
FR2855627A1 (fr) | 2004-12-03 |
DE10324049A1 (de) | 2004-12-23 |
JP2004355631A (ja) | 2004-12-16 |
JP4095578B2 (ja) | 2008-06-04 |
US20040239400A1 (en) | 2004-12-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 13 |
|
PLFP | Fee payment |
Year of fee payment: 14 |
|
PLFP | Fee payment |
Year of fee payment: 15 |
|
ST | Notification of lapse |
Effective date: 20200114 |