FR2820844B1 - Dispositif de reconfiguration d'un ensemble memoire presentant des defauts - Google Patents

Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Info

Publication number
FR2820844B1
FR2820844B1 FR0101884A FR0101884A FR2820844B1 FR 2820844 B1 FR2820844 B1 FR 2820844B1 FR 0101884 A FR0101884 A FR 0101884A FR 0101884 A FR0101884 A FR 0101884A FR 2820844 B1 FR2820844 B1 FR 2820844B1
Authority
FR
France
Prior art keywords
reconfiguring
defects
memory assembly
memory
assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0101884A
Other languages
English (en)
Other versions
FR2820844A1 (fr
Inventor
Michael Nicolaidis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iroc Technologies SA
Original Assignee
Iroc Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iroc Technologies SA filed Critical Iroc Technologies SA
Priority to FR0101884A priority Critical patent/FR2820844B1/fr
Priority to US10/468,265 priority patent/US6946985B2/en
Priority to PCT/FR2002/000523 priority patent/WO2002065291A2/fr
Publication of FR2820844A1 publication Critical patent/FR2820844A1/fr
Application granted granted Critical
Publication of FR2820844B1 publication Critical patent/FR2820844B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
FR0101884A 2001-02-12 2001-02-12 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts Expired - Lifetime FR2820844B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0101884A FR2820844B1 (fr) 2001-02-12 2001-02-12 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts
US10/468,265 US6946985B2 (en) 2001-02-12 2002-02-12 Device for reconfiguring a faulty storage assembly
PCT/FR2002/000523 WO2002065291A2 (fr) 2001-02-12 2002-02-12 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0101884A FR2820844B1 (fr) 2001-02-12 2001-02-12 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Publications (2)

Publication Number Publication Date
FR2820844A1 FR2820844A1 (fr) 2002-08-16
FR2820844B1 true FR2820844B1 (fr) 2003-05-30

Family

ID=8859908

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0101884A Expired - Lifetime FR2820844B1 (fr) 2001-02-12 2001-02-12 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Country Status (3)

Country Link
US (1) US6946985B2 (fr)
FR (1) FR2820844B1 (fr)
WO (1) WO2002065291A2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7203873B1 (en) 2004-06-04 2007-04-10 Magma Design Automation, Inc. Asynchronous control of memory self test
US20060182187A1 (en) * 2005-02-11 2006-08-17 Likovich Robert B Jr Automatic reconfiguration of an I/O bus to correct for an error bit
JP4821198B2 (ja) * 2005-07-12 2011-11-24 ソニー株式会社 半導体集積回路とその製造方法
JP4552803B2 (ja) * 2005-08-10 2010-09-29 ソニー株式会社 半導体集積回路
US20090177919A1 (en) * 2008-01-04 2009-07-09 International Business Machines Corporation Dynamic redundancy for microprocessor components and circuits placed in nonoperational modes
US7783940B2 (en) * 2008-06-06 2010-08-24 Syntest Technologies, Inc. Apparatus for redundancy reconfiguration of faculty memories
MA55238B1 (fr) * 2021-12-23 2023-10-31 Nabil Guennoun Dispositif de protection, de réparation ou de changement de comportement d’un circuit électrique ou électronique utilisant une fonction de remplacement d’un composant à l'aide d'une commutation redondante.

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833577B2 (ja) * 1977-03-17 1983-07-20 富士通株式会社 集積回路
US4355391A (en) * 1980-03-31 1982-10-19 Texas Instruments Incorporated Apparatus and method of error detection and/or correction in a data set
KR100252053B1 (ko) * 1997-12-04 2000-05-01 윤종용 칼럼 방향의 데이터 입출력선을 가지는 반도체메모리장치와불량셀 구제회로 및 방법

Also Published As

Publication number Publication date
WO2002065291A3 (fr) 2004-08-19
US6946985B2 (en) 2005-09-20
US20040075461A1 (en) 2004-04-22
WO2002065291A2 (fr) 2002-08-22
FR2820844A1 (fr) 2002-08-16

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