FR2843208B1 - Dispositif de reconfiguration d'un ensemble memoire presentant des defauts - Google Patents

Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Info

Publication number
FR2843208B1
FR2843208B1 FR0209762A FR0209762A FR2843208B1 FR 2843208 B1 FR2843208 B1 FR 2843208B1 FR 0209762 A FR0209762 A FR 0209762A FR 0209762 A FR0209762 A FR 0209762A FR 2843208 B1 FR2843208 B1 FR 2843208B1
Authority
FR
France
Prior art keywords
reconfiguring
defects
memory set
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0209762A
Other languages
English (en)
Other versions
FR2843208A1 (fr
Inventor
Michael Nicolaidis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iroc Technologies SA
Original Assignee
Iroc Technologies SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iroc Technologies SA filed Critical Iroc Technologies SA
Priority to FR0209762A priority Critical patent/FR2843208B1/fr
Priority to US10/286,686 priority patent/US7073102B2/en
Publication of FR2843208A1 publication Critical patent/FR2843208A1/fr
Application granted granted Critical
Publication of FR2843208B1 publication Critical patent/FR2843208B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
FR0209762A 2002-07-31 2002-07-31 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts Expired - Lifetime FR2843208B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0209762A FR2843208B1 (fr) 2002-07-31 2002-07-31 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts
US10/286,686 US7073102B2 (en) 2002-07-31 2002-11-01 Reconfiguration device for faulty memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0209762A FR2843208B1 (fr) 2002-07-31 2002-07-31 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Publications (2)

Publication Number Publication Date
FR2843208A1 FR2843208A1 (fr) 2004-02-06
FR2843208B1 true FR2843208B1 (fr) 2005-03-04

Family

ID=30129591

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0209762A Expired - Lifetime FR2843208B1 (fr) 2002-07-31 2002-07-31 Dispositif de reconfiguration d'un ensemble memoire presentant des defauts

Country Status (2)

Country Link
US (1) US7073102B2 (fr)
FR (1) FR2843208B1 (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7352780B1 (en) * 2004-12-30 2008-04-01 Ciena Corporation Signaling byte resiliency
US7286380B2 (en) * 2005-09-29 2007-10-23 Intel Corporation Reconfigurable memory block redundancy to repair defective input/output lines
JP4576433B2 (ja) * 2006-02-06 2010-11-10 富士通株式会社 情報処理装置、演算処理装置、情報処理装置の制御方法及びプログラム
US7945823B2 (en) * 2006-03-02 2011-05-17 Netlogic Microsystems, Inc. Programmable address space built-in self test (BIST) device and method for fault detection
US7783940B2 (en) * 2008-06-06 2010-08-24 Syntest Technologies, Inc. Apparatus for redundancy reconfiguration of faculty memories
US9021441B2 (en) * 2009-03-30 2015-04-28 Verizon Patent And Licensing Inc. Methods and systems of determining a quality level of a software instance
JP6083576B2 (ja) * 2011-12-23 2017-02-22 インテル・コーポレーション メモリデバイス、方法、およびシステム
US9158619B2 (en) 2012-03-30 2015-10-13 Intel Corporation On chip redundancy repair for memory devices

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0389203A3 (fr) * 1989-03-20 1993-05-26 Fujitsu Limited Dispositif de mémoire à semi-conducteur comportant de l'information indiquant la présence de cellules de mémoire défectueuses
JP2853406B2 (ja) * 1991-09-10 1999-02-03 日本電気株式会社 半導体記憶装置
US5412535A (en) * 1993-08-24 1995-05-02 Convex Computer Corporation Apparatus and method for cooling electronic devices
US5781717A (en) * 1996-09-19 1998-07-14 I-Cube, Inc. Dynamic spare column replacement memory system
US6085334A (en) * 1998-04-17 2000-07-04 Motorola, Inc. Method and apparatus for testing an integrated memory device
US6345373B1 (en) * 1999-03-29 2002-02-05 The University Of California System and method for testing high speed VLSI devices using slower testers
US6327680B1 (en) * 1999-05-20 2001-12-04 International Business Machines Corporation Method and apparatus for array redundancy repair detection
US6144593A (en) * 1999-09-01 2000-11-07 Micron Technology, Inc. Circuit and method for a multiplexed redundancy scheme in a memory device
CN1206659C (zh) * 1999-09-15 2005-06-15 皇家菲利浦电子有限公司 测试存储器的方法
TW514927B (en) * 2001-04-02 2002-12-21 Faraday Tech Corp Built-in programmable self-diagnosis method and circuit SRAM

Also Published As

Publication number Publication date
US7073102B2 (en) 2006-07-04
US20040059974A1 (en) 2004-03-25
FR2843208A1 (fr) 2004-02-06

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