FR2818425B1 - Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif - Google Patents

Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif

Info

Publication number
FR2818425B1
FR2818425B1 FR0016399A FR0016399A FR2818425B1 FR 2818425 B1 FR2818425 B1 FR 2818425B1 FR 0016399 A FR0016399 A FR 0016399A FR 0016399 A FR0016399 A FR 0016399A FR 2818425 B1 FR2818425 B1 FR 2818425B1
Authority
FR
France
Prior art keywords
memory cell
logic function
exclusive logic
cell reading
reading amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0016399A
Other languages
English (en)
Other versions
FR2818425A1 (fr
Inventor
Richard Ferrant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0016399A priority Critical patent/FR2818425B1/fr
Priority to PCT/FR2001/004004 priority patent/WO2002049034A2/fr
Priority to EP01994877A priority patent/EP1342241A2/fr
Priority to US10/450,803 priority patent/US6920075B2/en
Publication of FR2818425A1 publication Critical patent/FR2818425A1/fr
Application granted granted Critical
Publication of FR2818425B1 publication Critical patent/FR2818425B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
FR0016399A 2000-12-15 2000-12-15 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif Expired - Fee Related FR2818425B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR0016399A FR2818425B1 (fr) 2000-12-15 2000-12-15 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif
PCT/FR2001/004004 WO2002049034A2 (fr) 2000-12-15 2001-12-14 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif
EP01994877A EP1342241A2 (fr) 2000-12-15 2001-12-14 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif
US10/450,803 US6920075B2 (en) 2000-12-15 2001-12-14 Amplifier for reading storage cells with exclusive-OR type function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0016399A FR2818425B1 (fr) 2000-12-15 2000-12-15 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif

Publications (2)

Publication Number Publication Date
FR2818425A1 FR2818425A1 (fr) 2002-06-21
FR2818425B1 true FR2818425B1 (fr) 2003-04-04

Family

ID=8857718

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0016399A Expired - Fee Related FR2818425B1 (fr) 2000-12-15 2000-12-15 Amplificateur de lecture de cellules memoire a fonction logique de type ou-exclusif

Country Status (4)

Country Link
US (1) US6920075B2 (fr)
EP (1) EP1342241A2 (fr)
FR (1) FR2818425B1 (fr)
WO (1) WO2002049034A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2988535B1 (fr) 2012-03-23 2014-03-07 Soitec Silicon On Insulator Circuit de pompage de charge a transistors munis de portes doubles en phase, et procédé de fonctionnement dudit circuit.
US9153305B2 (en) 2013-08-30 2015-10-06 Micron Technology, Inc. Independently addressable memory array address spaces
US9455020B2 (en) * 2014-06-05 2016-09-27 Micron Technology, Inc. Apparatuses and methods for performing an exclusive or operation using sensing circuitry

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0787032B2 (ja) * 1985-07-08 1995-09-20 日本電気アイシ−マイコンシステム株式会社 半導体記憶装置
JPS6365418A (ja) * 1986-09-05 1988-03-24 Rohm Co Ltd 光情報処理装置の発光体光出力補正方法
US5034636A (en) * 1990-06-04 1991-07-23 Motorola, Inc. Sense amplifier with an integral logic function
US5859548A (en) * 1996-07-24 1999-01-12 Lg Semicon Co., Ltd. Charge recycling differential logic (CRDL) circuit and devices using the same
US6448818B1 (en) * 1999-12-30 2002-09-10 Intel Corporation Apparatus, method and system for a ratioed NOR logic arrangement

Also Published As

Publication number Publication date
EP1342241A2 (fr) 2003-09-10
US6920075B2 (en) 2005-07-19
FR2818425A1 (fr) 2002-06-21
WO2002049034A3 (fr) 2002-08-22
WO2002049034A2 (fr) 2002-06-20
US20040036508A1 (en) 2004-02-26

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20060831