FR2798226B1 - Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu - Google Patents

Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu

Info

Publication number
FR2798226B1
FR2798226B1 FR9911024A FR9911024A FR2798226B1 FR 2798226 B1 FR2798226 B1 FR 2798226B1 FR 9911024 A FR9911024 A FR 9911024A FR 9911024 A FR9911024 A FR 9911024A FR 2798226 B1 FR2798226 B1 FR 2798226B1
Authority
FR
France
Prior art keywords
packaging
semiconductor chip
chip containing
package obtained
containing sensors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9911024A
Other languages
English (en)
Other versions
FR2798226A1 (fr
Inventor
Bento Vieira Antonio Do
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR9911024A priority Critical patent/FR2798226B1/fr
Priority to PCT/FR2000/002367 priority patent/WO2001017033A1/fr
Priority to EP00958732A priority patent/EP1208605A1/fr
Priority to US10/070,080 priority patent/US6825551B1/en
Publication of FR2798226A1 publication Critical patent/FR2798226A1/fr
Application granted granted Critical
Publication of FR2798226B1 publication Critical patent/FR2798226B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
FR9911024A 1999-09-02 1999-09-02 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu Expired - Fee Related FR2798226B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9911024A FR2798226B1 (fr) 1999-09-02 1999-09-02 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu
PCT/FR2000/002367 WO2001017033A1 (fr) 1999-09-02 2000-08-24 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu
EP00958732A EP1208605A1 (fr) 1999-09-02 2000-08-24 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu
US10/070,080 US6825551B1 (en) 1999-09-02 2000-08-24 Method for packaging a semiconductor chip containing sensors and resulting package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9911024A FR2798226B1 (fr) 1999-09-02 1999-09-02 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu

Publications (2)

Publication Number Publication Date
FR2798226A1 FR2798226A1 (fr) 2001-03-09
FR2798226B1 true FR2798226B1 (fr) 2002-04-05

Family

ID=9549501

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9911024A Expired - Fee Related FR2798226B1 (fr) 1999-09-02 1999-09-02 Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu

Country Status (4)

Country Link
US (1) US6825551B1 (fr)
EP (1) EP1208605A1 (fr)
FR (1) FR2798226B1 (fr)
WO (1) WO2001017033A1 (fr)

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TW540157B (en) * 2001-05-31 2003-07-01 Konishiroku Photo Ind CMOS image sensor
DE10151151A1 (de) * 2001-10-19 2002-06-13 Infineon Technologies Ag Chipmodul
DE10205047B4 (de) * 2002-02-07 2006-01-05 Hella Kgaa Hueck & Co. Sensor, insbesondere zur Messung an oder in Flüssigkeiten sowie Verfahren zur Herstellung desselben
JP2003309271A (ja) * 2002-04-18 2003-10-31 Matsushita Electric Ind Co Ltd 集積回路素子の実装構造および実装方法
JP2004104103A (ja) * 2002-08-21 2004-04-02 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
US20040217451A1 (en) * 2002-11-14 2004-11-04 Sai-Mun Lee Semiconductor packaging structure
DE10328265A1 (de) 2003-06-23 2005-01-27 Infineon Technologies Ag Sensorbauteil und Nutzen zu seiner Herstellung
US7199438B2 (en) * 2003-09-23 2007-04-03 Advanced Semiconductor Engineering, Inc. Overmolded optical package
US8093694B2 (en) * 2005-02-14 2012-01-10 Stats Chippac Ltd. Method of manufacturing non-leaded integrated circuit package system having etched differential height lead structures
JP2008545264A (ja) * 2005-07-05 2008-12-11 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 液体中での使用のためのパッケージ化された半導体センサチップ
WO2007012992A1 (fr) 2005-07-28 2007-02-01 Nxp B.V. Emballage et procede de fabrication pour un composant microelectronique
KR101011572B1 (ko) * 2005-10-18 2011-01-27 오쎈테크, 인코포레이티드 유연회로를 포함하는 핑거 센서 및 관련 방법
US8358816B2 (en) * 2005-10-18 2013-01-22 Authentec, Inc. Thinned finger sensor and associated methods
US20070190685A1 (en) * 2006-02-10 2007-08-16 Ralph Ebbutt Cooling facility and method for integrated circuit
CN101207972B (zh) * 2006-12-22 2010-05-19 鸿富锦精密工业（深圳）有限公司 一种电路板及使用其的感光装置
US8035207B2 (en) * 2006-12-30 2011-10-11 Stats Chippac Ltd. Stackable integrated circuit package system with recess
US7633055B2 (en) * 2007-03-08 2009-12-15 Lumination Llc Sealed light emitting diode assemblies including annular gaskets and methods of making same
US8084299B2 (en) * 2008-02-01 2011-12-27 Infineon Technologies Ag Semiconductor device package and method of making a semiconductor device package
CN102278658B (zh) 2010-03-08 2016-02-10 照明有限责任公司 用于与led电源板模块一起使用的安装装置
EP2884242B1 (fr) * 2013-12-12 2021-12-08 ams International AG Emballage de capteur et procédé de fabrication
JP6314070B2 (ja) * 2014-10-07 2018-04-18 新光電気工業株式会社 指紋認識用半導体装置、指紋認識用半導体装置の製造方法及び半導体装置
US10121043B2 (en) * 2014-11-18 2018-11-06 Sunasic Technologies, Inc. Printed circuit board assembly with image sensor mounted thereon

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JPS6378557A (ja) * 1986-09-22 1988-04-08 Hitachi Ltd 樹脂封止型半導体装置
EP0630056B1 (fr) * 1993-05-28 1998-02-18 Toshiba Ave Co., Ltd Utilisation d'un film conducteur anisotropique pour connecter les pistes d'un circuit imprimé aux plots d'électrode d'un dispositif de conversion photoélectrique et méthode de montage de ce dispositif
US5773886A (en) * 1993-07-15 1998-06-30 Lsi Logic Corporation System having stackable heat sink structures
US5821457A (en) * 1994-03-11 1998-10-13 The Panda Project Semiconductor die carrier having a dielectric epoxy between adjacent leads
NL9400766A (nl) * 1994-05-09 1995-12-01 Euratec Bv Werkwijze voor het inkapselen van een geintegreerde halfgeleiderschakeling.
KR0148733B1 (ko) * 1995-04-27 1998-08-01 문정환 고체 촬상 소자용 패키지 및 그 제조방법
US5952714A (en) * 1995-08-02 1999-09-14 Matsushita Electronics Corporation Solid-state image sensing apparatus and manufacturing method thereof
US6078502A (en) * 1996-04-01 2000-06-20 Lsi Logic Corporation System having heat dissipating leadframes
US5817540A (en) * 1996-09-20 1998-10-06 Micron Technology, Inc. Method of fabricating flip-chip on leads devices and resulting assemblies
US5949655A (en) * 1997-09-09 1999-09-07 Amkor Technology, Inc. Mounting having an aperture cover with adhesive locking feature for flip chip optical integrated circuit device
US6078102A (en) * 1998-03-03 2000-06-20 Silicon Bandwidth, Inc. Semiconductor die package for mounting in horizontal and upright configurations

Also Published As

Publication number Publication date
US6825551B1 (en) 2004-11-30
WO2001017033A1 (fr) 2001-03-08
EP1208605A1 (fr) 2002-05-29
FR2798226A1 (fr) 2001-03-09

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ST Notification of lapse

Effective date: 20060531