FR2769248B1 - Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat - Google Patents

Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat

Info

Publication number
FR2769248B1
FR2769248B1 FR9712436A FR9712436A FR2769248B1 FR 2769248 B1 FR2769248 B1 FR 2769248B1 FR 9712436 A FR9712436 A FR 9712436A FR 9712436 A FR9712436 A FR 9712436A FR 2769248 B1 FR2769248 B1 FR 2769248B1
Authority
FR
France
Prior art keywords
oxide
mechanical
substrate
nitride layer
layer deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9712436A
Other languages
English (en)
Other versions
FR2769248A1 (fr
Inventor
Alain Fleury
Francois Tardif
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR9712436A priority Critical patent/FR2769248B1/fr
Priority to PCT/FR1998/002125 priority patent/WO1999018605A1/fr
Priority to EP98947604A priority patent/EP1021825A1/fr
Priority to JP2000515291A priority patent/JP2001519599A/ja
Publication of FR2769248A1 publication Critical patent/FR2769248A1/fr
Application granted granted Critical
Publication of FR2769248B1 publication Critical patent/FR2769248B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02052—Wet cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Weting (AREA)
FR9712436A 1997-10-06 1997-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat Expired - Fee Related FR2769248B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR9712436A FR2769248B1 (fr) 1997-10-06 1997-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat
PCT/FR1998/002125 WO1999018605A1 (fr) 1997-10-06 1998-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat
EP98947604A EP1021825A1 (fr) 1997-10-06 1998-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat
JP2000515291A JP2001519599A (ja) 1997-10-06 1998-10-06 機械化学的研磨後の酸化物又は窒化物層の洗浄方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9712436A FR2769248B1 (fr) 1997-10-06 1997-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat

Publications (2)

Publication Number Publication Date
FR2769248A1 FR2769248A1 (fr) 1999-04-09
FR2769248B1 true FR2769248B1 (fr) 2000-01-28

Family

ID=9511875

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9712436A Expired - Fee Related FR2769248B1 (fr) 1997-10-06 1997-10-06 Procede de nettoyage post-polissage mecano-chimique d'une couche d'oxyde ou de nitrure deposee sur un substrat

Country Status (4)

Country Link
EP (1) EP1021825A1 (fr)
JP (1) JP2001519599A (fr)
FR (1) FR2769248B1 (fr)
WO (1) WO1999018605A1 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000052747A1 (fr) * 1999-03-03 2000-09-08 Fsi International, Inc. Procede et systeme permettant de graver des substrats de facon uniforme au moyen d'une composition de gravure contenant une source d'ions fluorure et une source d'ions hydrogene
US6352595B1 (en) 1999-05-28 2002-03-05 Lam Research Corporation Method and system for cleaning a chemical mechanical polishing pad
US6692976B1 (en) * 2000-08-31 2004-02-17 Agilent Technologies, Inc. Post-etch cleaning treatment
US6800020B1 (en) 2000-10-02 2004-10-05 Lam Research Corporation Web-style pad conditioning system and methods for implementing the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5064683A (en) * 1990-10-29 1991-11-12 Motorola, Inc. Method for polish planarizing a semiconductor substrate by using a boron nitride polish stop
JPH065579A (ja) * 1992-06-23 1994-01-14 Sony Corp 半導体ウエハの洗浄方法
JPH06163496A (ja) * 1992-11-24 1994-06-10 Mitsubishi Materials Corp シリコンウェーハの洗浄液およびその洗浄方法
US5516730A (en) * 1994-08-26 1996-05-14 Memc Electronic Materials, Inc. Pre-thermal treatment cleaning process of wafers

Also Published As

Publication number Publication date
EP1021825A1 (fr) 2000-07-26
FR2769248A1 (fr) 1999-04-09
JP2001519599A (ja) 2001-10-23
WO1999018605A1 (fr) 1999-04-15

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Legal Events

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ST Notification of lapse

Effective date: 20070629