FR2752470B1 - Dispositif et procede pour traiter des evenements d'interruption et d'exception dans une architecture a multiprocesseurs asymetriques - Google Patents

Dispositif et procede pour traiter des evenements d'interruption et d'exception dans une architecture a multiprocesseurs asymetriques

Info

Publication number
FR2752470B1
FR2752470B1 FR9710437A FR9710437A FR2752470B1 FR 2752470 B1 FR2752470 B1 FR 2752470B1 FR 9710437 A FR9710437 A FR 9710437A FR 9710437 A FR9710437 A FR 9710437A FR 2752470 B1 FR2752470 B1 FR 2752470B1
Authority
FR
France
Prior art keywords
processing interruption
multiprocessor architecture
exception events
asymmetric multiprocessor
asymmetric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9710437A
Other languages
English (en)
Other versions
FR2752470A1 (fr
Inventor
Peter Song Seungyoon
A Mohamed Moataz
Trong Nguyen Le
Chul Park Heon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of FR2752470A1 publication Critical patent/FR2752470A1/fr
Application granted granted Critical
Publication of FR2752470B1 publication Critical patent/FR2752470B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
FR9710437A 1996-08-19 1997-08-18 Dispositif et procede pour traiter des evenements d'interruption et d'exception dans une architecture a multiprocesseurs asymetriques Expired - Fee Related FR2752470B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/699,294 US6003129A (en) 1996-08-19 1996-08-19 System and method for handling interrupt and exception events in an asymmetric multiprocessor architecture

Publications (2)

Publication Number Publication Date
FR2752470A1 FR2752470A1 (fr) 1998-02-20
FR2752470B1 true FR2752470B1 (fr) 1999-06-11

Family

ID=24808708

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9710437A Expired - Fee Related FR2752470B1 (fr) 1996-08-19 1997-08-18 Dispositif et procede pour traiter des evenements d'interruption et d'exception dans une architecture a multiprocesseurs asymetriques

Country Status (7)

Country Link
US (1) US6003129A (fr)
JP (1) JPH10154080A (fr)
KR (1) KR100257520B1 (fr)
CN (1) CN1176437B (fr)
DE (1) DE19735870A1 (fr)
FR (1) FR2752470B1 (fr)
TW (1) TW358919B (fr)

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US7080205B2 (en) * 2000-03-29 2006-07-18 Fujitsu Siemens Computer Gmbh Arrangement and method for reducing the processing time of a data processing device
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US7721024B2 (en) * 2003-11-12 2010-05-18 Dell Products L.P. System and method for exiting from an interrupt mode in a multiple processor system
US20050102457A1 (en) * 2003-11-12 2005-05-12 Dell Products L.P. System and method for interrupt processing in a multiple processor system
US7529914B2 (en) * 2004-06-30 2009-05-05 Intel Corporation Method and apparatus for speculative execution of uncontended lock instructions
US7487503B2 (en) 2004-08-12 2009-02-03 International Business Machines Corporation Scheduling threads in a multiprocessor computer
US8020141B2 (en) 2004-12-06 2011-09-13 Microsoft Corporation Operating-system process construction
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JP2006243838A (ja) * 2005-02-28 2006-09-14 Toshiba Corp プログラム開発装置
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US7447874B1 (en) * 2005-10-18 2008-11-04 Qlogic, Corporation Method and system for designing a flexible hardware state machine
US8074231B2 (en) * 2005-10-26 2011-12-06 Microsoft Corporation Configuration of isolated extensions and device drivers
KR100807039B1 (ko) * 2006-04-07 2008-02-25 주식회사 퓨쳐시스템 비대칭 다중 프로세싱 시스템 및 그 방법
US8032898B2 (en) * 2006-06-30 2011-10-04 Microsoft Corporation Kernel interface with categorized kernel objects
CN100449495C (zh) * 2006-08-25 2009-01-07 华为技术有限公司 一种辅助cpu对芯片进行驱动的系统及方法
US8789063B2 (en) 2007-03-30 2014-07-22 Microsoft Corporation Master and subordinate operating system kernels for heterogeneous multiprocessor systems
US20080244507A1 (en) * 2007-03-30 2008-10-02 Microsoft Corporation Homogeneous Programming For Heterogeneous Multiprocessor Systems
DE102007025397B4 (de) * 2007-05-31 2010-07-15 Advanced Micro Devices, Inc., Sunnyvale System mit mehreren Prozessoren und Verfahren zu seinem Betrieb
JP2009251802A (ja) * 2008-04-03 2009-10-29 Panasonic Corp マルチプロセッサシステムおよびマルチプロセッサシステムの割込み制御方法
KR101717494B1 (ko) * 2010-10-08 2017-03-28 삼성전자주식회사 인터럽트 처리 장치 및 방법
JP5972888B2 (ja) * 2011-09-29 2016-08-17 シャープ株式会社 画像復号装置、画像復号方法および画像符号化装置
GB2495959A (en) * 2011-10-26 2013-05-01 Imagination Tech Ltd Multi-threaded memory access processor
WO2013106210A1 (fr) * 2012-01-10 2013-07-18 Intel Corporation Appareil électronique à bancs de mémoire parallèles
US9405551B2 (en) * 2013-03-12 2016-08-02 Intel Corporation Creating an isolated execution environment in a co-designed processor
US20160147536A1 (en) * 2014-11-24 2016-05-26 International Business Machines Corporation Transitioning the Processor Core from Thread to Lane Mode and Enabling Data Transfer Between the Two Modes
CN107436752B (zh) * 2017-07-20 2020-12-01 龙芯中科技术有限公司 异常现场恢复方法、装置及计算机可读存储介质
CN108037951B (zh) * 2017-12-27 2020-11-20 山东师范大学 一种dtp处理器的中断快速切换方法及装置
CN108845969B (zh) * 2018-03-28 2021-09-10 核工业理化工程研究院 适用于不完全对称多处理微控制器的操作控制方法及操作系统
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CN115167933B (zh) * 2022-09-08 2022-12-02 深圳市恒运昌真空技术有限公司 一种双处理器设备及其控制方法和处理器

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Also Published As

Publication number Publication date
CN1176437B (zh) 2010-06-02
KR19980018067A (ko) 1998-06-05
DE19735870A1 (de) 1998-03-19
TW358919B (en) 1999-05-21
CN1176437A (zh) 1998-03-18
KR100257520B1 (ko) 2000-06-01
FR2752470A1 (fr) 1998-02-20
US6003129A (en) 1999-12-14
JPH10154080A (ja) 1998-06-09

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Effective date: 20130430