FR2744265B1 - Controleur de bus et methode permettant l'insertion et la deconnexion sous tension dans un bus synchrone - Google Patents

Controleur de bus et methode permettant l'insertion et la deconnexion sous tension dans un bus synchrone

Info

Publication number
FR2744265B1
FR2744265B1 FR9700886A FR9700886A FR2744265B1 FR 2744265 B1 FR2744265 B1 FR 2744265B1 FR 9700886 A FR9700886 A FR 9700886A FR 9700886 A FR9700886 A FR 9700886A FR 2744265 B1 FR2744265 B1 FR 2744265B1
Authority
FR
France
Prior art keywords
bus
disconnection
synchronous
bus controller
enabled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9700886A
Other languages
English (en)
Other versions
FR2744265A1 (fr
Inventor
Kiyishi Shinomiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of FR2744265A1 publication Critical patent/FR2744265A1/fr
Application granted granted Critical
Publication of FR2744265B1 publication Critical patent/FR2744265B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4081—Live connection to bus, e.g. hot-plugging

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
FR9700886A 1996-01-29 1997-01-28 Controleur de bus et methode permettant l'insertion et la deconnexion sous tension dans un bus synchrone Expired - Fee Related FR2744265B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP01288496A JP3293733B2 (ja) 1996-01-29 1996-01-29 共通バス制御装置

Publications (2)

Publication Number Publication Date
FR2744265A1 FR2744265A1 (fr) 1997-08-01
FR2744265B1 true FR2744265B1 (fr) 1999-03-12

Family

ID=11817839

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9700886A Expired - Fee Related FR2744265B1 (fr) 1996-01-29 1997-01-28 Controleur de bus et methode permettant l'insertion et la deconnexion sous tension dans un bus synchrone

Country Status (3)

Country Link
US (1) US5920707A (fr)
JP (1) JP3293733B2 (fr)
FR (1) FR2744265B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100437826C (zh) * 2004-09-16 2008-11-26 展讯通信（上海）有限公司 有异步缓存的双倍速动态随机存取存储器控制装置及方法
JP2007156512A (ja) * 2005-11-30 2007-06-21 Brother Ind Ltd 状態情報取得処理プログラム、状態情報取得装置、および状態情報取得システム

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR373043A (fr) *
JPS58219627A (ja) * 1982-06-15 1983-12-21 Fuji Electric Co Ltd バスシステム
US4814974A (en) * 1982-07-02 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Programmable memory-based arbitration system for implementing fixed and flexible priority arrangements
JPS61259357A (ja) * 1985-05-14 1986-11-17 Toshiba Corp 共通バス制御方式
JPH01196616A (ja) * 1988-01-30 1989-08-08 Toshiba Corp 電子機器システム
IT1217801B (it) * 1988-06-08 1990-03-30 Honeywell Rull Italia S P A Apparato per rimozione/inserzione a caldo su un bus di connessione di unita, di registrazione magnetica a supporto non rimovibile
US4999787A (en) * 1988-07-15 1991-03-12 Bull Hn Information Systems Inc. Hot extraction and insertion of logic boards in an on-line communication system
FR2640403B1 (fr) * 1988-12-09 1991-02-01 Bull Sa Systeme electronique a plusieurs unites amovibles
US5202965A (en) * 1988-12-09 1993-04-13 Bull, S.A. Electronic system with a plurality of removable units
US5237686A (en) * 1989-05-10 1993-08-17 Mitsubishi Denki Kabushiki Kaisha Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority
JPH0366420U (fr) * 1989-10-31 1991-06-27
EP0548382A1 (fr) * 1991-12-20 1993-06-30 Siemens Nixdorf Informationssysteme Aktiengesellschaft Méthode et dispositif d'échange de modules dans un système de bus en fonctionnement
JPH0821015B2 (ja) * 1992-01-20 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュータならびにそのシステム再構成化装置および方法
US5371743A (en) * 1992-03-06 1994-12-06 Data General Corporation On-line module replacement in a multiple module data processing system
JP3476499B2 (ja) * 1993-05-19 2003-12-10 富士通株式会社 データ転送方式
US5473499A (en) * 1993-06-30 1995-12-05 Harris Corporation Hot pluggable motherboard bus connection method
JPH0744293A (ja) * 1993-08-03 1995-02-14 Yokogawa Electric Corp バスインターフェース装置
DE69518264T2 (de) * 1994-03-25 2001-03-29 Advanced Micro Devices Inc Gerät und Verfahren zum Ermöglichen der Ankoppelung eines koppelbaren Rechnersystems während des Betriebes
US5632020A (en) * 1994-03-25 1997-05-20 Advanced Micro Devices, Inc. System for docking a portable computer to a host computer without suspending processor operation by a docking agent driving the bus inactive during docking
US5581712A (en) * 1994-11-17 1996-12-03 Intel Corporation Method and apparatus for managing live insertion of CPU and I/O boards into a computer system
US5625238A (en) * 1995-02-03 1997-04-29 Motorola, Inc. Apparatus for non-disruptively interconnecting perpheral device modules with a host device

Also Published As

Publication number Publication date
FR2744265A1 (fr) 1997-08-01
JP3293733B2 (ja) 2002-06-17
JPH09204397A (ja) 1997-08-05
US5920707A (en) 1999-07-06

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20070930