FR2623951A1 - LINEAR AMPLIFIER HYPERFREQUENCE WITH VERY LARGE BANDWIDTH - Google Patents

Abstract

A linear microwave amplifier is described: its bandwidth is equal to that of the transistors which constitute it, without being limited by the usual bias circuits which include chokes and capacitors with low bandwidth. In this amplifier which includes at least one input transistor 1, the gate bias, at rest, is provided by a BFL type circuit 7, 8, 9, 10, 12, generally used in logic, the output of which is looped back. on the entrance. The input signal VI is applied to both the inverting transistor 7 of the BFL and to the input transistor 1. The same BFL circuit used in an amplification stage 1 + 13 ensures the self-adaptation of the cascadable stages. . Linear application, in a frequency band from 1 to 100 GHz, and to the regeneration of logic signals.

Description

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very wide passerby.

  It is also known that a microwave transistor can amplify, in linear circuits, up to very high frequencies, but the problems of the microwave amplifiers come from the circuits of adaptation, that is to say of polarization and charge, which have fairly narrow bandwidths. Indeed the polishing circuits, for example, are generally made, from a bias voltage, by means of resistance, solfs and capacitors.

  who themselves have bands passing as close as they are.

  The invention therefore consists in implementing circuits known in logic for adapting and biasing the amplifier stages, so as to obtain a linear amplifier of

very wide bandwidth.

  In order to operate in very good conditions, a microwave transistor - very generally of the field effect type - must have its gate biased at rest at a correctly chosen bias voltage according to the transistor characteristic diagrams I (V). but this bias voltage must be stable. It is conventional to provide the bias voltage from a source that delivers through a resistor in series with a choke, a capacitor being connected in parallel and put in the mnsco: these components consume a large surface in monolithic integraratinn, this which means that they are not wanted for the fabrication of microwave integrated circuits in GaAs, but they have not only

  a narrow bandwidth that limits the amplifier's cello.

  According to the invention, the gate of at least one field effect transistor in a hyperfrequency amplifier is biased at rest by a conrnu logic circuit which comprises an inverter BFL type (Bufferedç fet logic), followed by a shifter. The input signal is applied simultaneously to the gate of the input field effect transistor of the Inverter and to the gate of the input field folate transistor of the amplifier, which is itself connected to the Inverter. output of the shifter: each time the polari.ation voltage on the gate of the amplifier transistor varies, the réaention rle the BFL gate and

  the shifter returns this voltage to SA initial value.

  Furthermore, the amplifier comprises at least one stage in which two transistors are mounted as a differential amplifier, in the manner of an OR-NOT logic gate. The gate of the first transistor receives the input signal. The gate of the second transistor is polarized by the output signal of this stage, through a circuit comprising an inverter and a shifter identical to the circuit described ri-dcs.us: this arrangement makes it possible to stabilize the voltage rc bias of the second transistor of this stage and at the same time the bias voltage of the input transistor of the next amplification stage. Several amplification stages can then be cascaded, since their inputs and outputs are self-tuned. More specifically, the invention relates to a very wide frequency bandwidth microwave linear amplifier comprising at least one field effect transistor whose gate receives a signal from the input. this amplifier being characterized in that the gate bias circuit of the gate of this input transistor is constituted by a logic circuit of BFL type comprising: an inverter formed by a transis.tor nt its active load, powered from a first voltage source - a shifter formed by a transistor clont the gate is connected to the drain of the transistor inverspur, and whose source is connected to at least one diode and A uin current source transistor, the shifter being fed between the first voltage source and a second negative voltage source, - the input signal being imultaneously applied to the gate of the inverter transistor, and su ,, r the gate of the amplifier input transistor , said grid being furthermore united at the exit point of the shifter common to the cathode of the diode

  and at the drain of the source source transistor.

  The invention will be better understood by the description

  more detail which follows now an example of realization of microwave amplifier of very wide band, this

  description based on the attached figures, which

  represent: FIG. 1: polarization circuit of a microwave field effect transistor according to the known art; FIG. 2: polarization circuit of a microwave field effect transistor according to the invention; FIG. 3: diagram electrical of an amplifier

  very high bandwidth microwave sqolon the invention.

  FIG. 1, which shows a polarization circuit of a transistor A hm effect transistor according to the known art, is intended to recall the limitations provided by the techniques of the prior art. A field effect transistor 1, which is, for example, the input transistor 1 of an amplifier, receives on its gate an input signal Vl which is often applied through a connection capacitor 2, with an input impedance. 3 which is very generally normalized to 50 Ohms. In order for transistor 1 to operate correctly, this gate must be biased to a fixed voltage supplied by a bias voltage source Vp, but this voltage is applied through a circuit such as that which is represented, or through other types. circuitry that utilizes passive components, as opposed to semiconductor components. In the case of Figure 1, which is not limiting of the known art, the bias voltage VP is imitated through a resistor 4, connected in series with a self 5, landis a capacity 6 ensures the decoupling the mass. the main disadvantage of this type of bias circuit is that the self 5 and the capacitor 6 occupy an important place on the pastillfie of an integrated circuit, if it is a microwave circuit integrated on a fast material Tll-V, but anyway the circuit composed by a self 5 and a capacitance 6 itself has a relatively narrow bandwidth limiting

262395 1

  so the bandwidth of the polarized amplifiers through this

polarization circuit.

  The basis of the invention is therefore to provide a bias voltage by means of a circuit which uses only semiconductor components, themselves having a bandwidth as wide as the semiconductor components which constitute the amplifier. l, polarization ring

  according to the invention is shown in FIG.

  If it is considered that the transistor 1 is the input transistor of a microwave amplifier, it receives on its gate the input signal VI through a capacitor 2, and under an impedance generally normalized to 50 Ohms by the resistance 3, therefore under the same conditions as in the prior art. But the bias voltage applied to its gate, at rest, ie when there is no input signal, is obtained by means of a circuit comprising an inverter of the BFL type, followed by a decant. The gate BFL is constituted by an effect transistor d (the field 7, charged by a charge transistor 8, itself fed from a voltage VDD The drain of the transistor 7 is connected to the source of a transistor 8, which is itself short-circuited with its gate, the gate of transistor 7 is connected to the input signal of the amplifier at point A. At the point P common between the drain of transistor 7 and the source of transistor 8, the The inverted signal is applied to the gate of a transistor 9, the drain of which is also supplied by the voltage V DD .The voltage of the source of the transistor 9 is shifted according to a technique known elsewhere through one or two diodes 10 and 11, although according to the importance of the desired offset, there may be a larger number of diodes, the cathode of the last of the offset diocides is connected to a so-called return transistor 12 whose short-circuited source and gate are energized by one

negative voltage VR.

  Finally, the common point between the last of the offset diodes and the drain of the return transistor 12, which constitutes the output of this shift stage, is connected to the gate of the input transistor 1 of the amnplificletir stage, but also this point is looped back to point A, where o is connected to

  13F1 input gate transistor gate ,.

  The input transistor 7 of the inverter stage has a transconductance G7; the active load transistor 8 supplies a current IBI and VA is the voltage at the point A, and VT the threshold voltage of the transistor 7. Each time that In voltage VA varies, the variation signal is inverted by the inverter BFL 7 + 8 , then shifted through the trnnsistor 9 mounted source follower and through the diodes 10 and 11: the reaction of the shifter stage brings VA to its initial value. Indeed, it can be observed that the voltage at the common point between the diode 11, the gate of transistor 1 and the drain of transistor 12 is the same as the voltage at A. At equilibrium, we have: IB = G7 (VA (1) This arrangement thus makes it possible to polish the gate of the input transitor 1 of the amplified stage to a fixed and optimum level chosen according to the curves of characteristics of this

transistor 1.

  FIG. 3 represents the electrical diagram of a very wide band amplifier, using the polarization circuit which has just been described in FIG. 2, for its input stage, as well as the same circuit for ensuring adaptation between the stages of the amplifier. In this figure, the input bias stage, the first amplification stage, the first shift stage, a second amplification stage and the second stage of amplification have been separated by voided dotted lines.

  a second shift stage, followed by an output stage.

  Let's consider for the moment the polarization stage and the first amplification stage, with its shift or adaptation stage. Two amplification stages have been represented in this FIG. 3, but generally the amplifier according to the invention can be cascadabin and include a number

  any amplification stage.

  The polarization stage is exactly identical, with the modifications of graphical representation, to the polarization stage represented in FIG. 2. The transistor 7 of the BFL gate has been shown in a different way to facilitate the observation of the repeatability of the circuit between the floor of

  polarization and amplification stages.

  The first amplification stage comprises a differential amplifier constituted by the transistor 1, which therefore constitutes the input transistor of the amplifier, and the transistor 13. These two transistors are mounted as a common source and their drains joined, which means a resemblance to an OR gate with two inputs on BFL logic. The drain common to the two transistors 1 and 13 is connected to an active load 80, itself powered from a voltage

  VDD, as indeed all the transistors of the amplifier.

  The source of the charge 80, connected to the gate, supplies the gate of a transistor 90 mounted as a source follower. The latter delivers through two offset diodes 100 and 110, with a common point between the gate of the transistor 13, the gate of the input transistor 14 of a next amplification stage, and the drain of a return transistor. 120, connected by its source to a negative voltage VR. It can be seen that the benchmarks of the components of the amplification stage and of the next stage shifting or matching stage have been intentionally chosen to highlight circuit similarity with the bias circuit. In this amplification stage, the inverter BFEL is constituted by the transistors 1 and 80 and the offset bias stage consists of the transistor 90 and the diodes 100 and 110 and the biasing transistor 120. The difference between the bias stage and this first amplification stage is that a transistor 13 is connected in parallel with the transistor 1, and has its gate connected to the common point D. Call C the common point between the source of the transistor 80, the drain of the differential amplifier 11 + 13 and IR gate of the follower transistor 90. At equilibrium we have

IC 1+ 113

  if we call I and I13 the currents. crossing the

transistors 1 and 13.

  1C - G1 (VA - VT) + G13 (VD - VT) (2)

  G1 and G13 being the transconductures of transistors 1 and 13, the threshold voltages VT being the same for all

  transistors of the same integrated circuit.

  This equation 2 makes it possible to fix the equilibrium voltage VD at the point D, ie the bias voltage of both the transistor 13 and the transistor 14, ie the bias voltage on the input transistor of the state. following. By derivation in equation 2 we have:

G VA + G13 A VI =

  since IC is a constant. We draw GI A VD A3A 1 Ai A VA

1 13 (3)

with A1 = G1

G =

  which constitutes the amplification factor. We can therefore note that to have amplification it is necessary that G1 is greater than G13, but we can also have attenutfion.si we choose G13 plus

great than G1.

  Equation 3 shows that each time that the input voltage VA varies from A VA, the output voltage Vi) of the first amplification stage is amplified in - A 1AVA: the circuit

  works well as a linear amplifier.

  But furthermore, since only a part of this amplification stage has been observed to function exactly in the same way as the input bias stage, it is concluded that the voltage VD is stabilized in the same way. that the bias voltage VA of the transistor I: therefore the bias voltage of the epititre transistor 14 of a subsequent amplification stage is it au.l stahbllisée. So there is adaptation between the stages cascadéq in tun amplifier to

many floors.

  Now consider an amplifier that has two amplification stages as shown in Figure 3. The second amplification stage will operate in exactly the same way as the first amplification stage and if we call E the common point between the drains of the differential amplifier, constituted by the transistors 14 and 15, and the transistor 81, and F Io common point between the diodes 101 and 111, the drain of the transistor 121 and the gate of the transistor 15, there is the same way as before

E 114 + 15

  E = G14 (VD-VT) + G15 (VF-VT) (4)

  G14 and G15 being the transconductances of transistors 14 and 15, VD the voltage applied to the gate of the input transistor 14, VF the output voltage applied to the gate of transistor 15, VT their set voltage l switches which is the same for all transistors of the integrated circuit. As VD is fixed by equation 2, equation 4 sets the voltage VF. In the same way as previously we obtain ampliflcation in small GA signals VF = 1 to V = -A2 aVD D'o Az D'o VF = Al A2 VA The two stages of amplification give a gain in decibels which

  is the sum of the gains in decibels of each floor.

  The output signals at the point F of the second stage can be amplified by a last power stage constituted by a transistor 16, which can output signals

  can be used in 50 ohm connections by oxeomple.

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Claims (5)

  1 - Very wide bandwidth microwave linear amplifier, comprising at least one field effect transistor (1) whose gate receives an input signal (Vi), this amplifier being characterized in that the polarization circuit at rest of the gate r1i its input transistor (1) is constituted by a logical flow type BFL comprising: - an invertor formed by a tran.is.tor (7) and its active load (8), fed from a first source of voltage (VDD) I0 D   a shifter formed by a tran.si.tor (R) whose gate is connected to the drain of the transistor (7) of the inverter, and whose soruce is connected to at least one diode (10) and to a transistor ( 12) current source, the shifter being supplied between the first voltage source (VDD) and a second negative voltage source (V2), - the input signal (VI) being applied simultaneously to the gate of the transistor (7) of the inverspurpur, and on the gate of the transistor (1) input of the amplifier, said gate being further joined to the point of the disconnect, common to the cathode of the diode (10) and the drain of the transistor source of current (12).   2 - Linear microwave amplifier according to claim i comprising- at least one amplification stage whose input transistor (1) has sn gate biased at rest by a logic circuit RBFT type, this amplifier being characterized in that its stage amplifier comprises: - a differential amplifier formed by said input transistor (1) and a second transistor (13), their sources being connected to the ground, and their ends united together, - a self-adapting circuit of the type BUTI, for which the 12 2623951   input transistor (1) of the stage is also the input transistor of the inverter (1 + 80), nla output (D) of the shifter (90 * 100 * 120) of this circulit BP1, being connected to the gate of the second transistor (13) of the differential amplifier 'and to a load (14), whose quiescent polarization voltage is thus self-adapted, and follows the polarization voltage of gate of the input transistor (1).   3 - linear microwave amplifier according to claim 1, characterized in that the bias voltage at rest (VA) of the gate (1 input transistor (1) is defined by the equation IB = G7 (VA - VT)   IB being the current flowing through Iran. Inverter (7) of transconductance G7, VT being the threshold voltage common to the transistors of the circuit. 4 - linear amplifier linear frequency according to claim 1, characterized in that the drueller (9 + 10 + 12) in the BFL type circuit stabilizes IR bias voltage at rest (VA) of the gate trnn.sistor input ( 1) to his balance. - Linear microwave amplifier according to Claim 2, characterized in that qa the bias voltage at rest (VD) of the gate of the second transistor (13) of the differential amplifier (1 + 13) is self-adapted according to the bias voltage at rest (VA) of the gate of the input transistor (1) according to the equation: G1 av GL I VA A it VA 13   where G1 is the transconductance of the input transistor (1) G13 is the transconductance of the second trAnsitor (13) of the differential amplifier (1 + 13)   A1 = G1 / G13 is the amplification factor.   6 - linear amplifier hyporfréqiuenre according to claim 2, characterized in cO quo several ampllfication stages are cascadables, polarization tlonsions   at rest (VA, VD, VF) being self-taught.   7 - Microwave linear amplifier according to one   any of claims pr.c (cldntos, characterized in that   that the bandwidth of its polishing circuits (7 + 8 + 9 + 10 + 12) and of self-adaptation (80 + 90 + 100 + 120) is the same as that of the amplification circuits (1 + 13), all the transistors of this amplifier being made in the same technology. 8 - Amplifier linear hyperfrequency according to one   any of the preceeding claims, characterized in that   that it is realized in integrated circuit, on the fast milk of the III-V family such as GaAs.