FR2608319B1 - Dispositif de protection contre les surtensions, a jonction plane - Google Patents

Dispositif de protection contre les surtensions, a jonction plane

Info

Publication number
FR2608319B1
FR2608319B1 FR8617565A FR8617565A FR2608319B1 FR 2608319 B1 FR2608319 B1 FR 2608319B1 FR 8617565 A FR8617565 A FR 8617565A FR 8617565 A FR8617565 A FR 8617565A FR 2608319 B1 FR2608319 B1 FR 2608319B1
Authority
FR
France
Prior art keywords
protection against
against overvoltages
plane junction
junction
plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8617565A
Other languages
English (en)
Other versions
FR2608319A1 (fr
Inventor
Patrice Jeudi
Christine Anceau
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thomson Semiconducteurs SA
Original Assignee
Thomson Semiconducteurs SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Semiconducteurs SA filed Critical Thomson Semiconducteurs SA
Priority to FR8617565A priority Critical patent/FR2608319B1/fr
Publication of FR2608319A1 publication Critical patent/FR2608319A1/fr
Application granted granted Critical
Publication of FR2608319B1 publication Critical patent/FR2608319B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/866Zener diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0688Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR8617565A 1986-12-16 1986-12-16 Dispositif de protection contre les surtensions, a jonction plane Expired FR2608319B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8617565A FR2608319B1 (fr) 1986-12-16 1986-12-16 Dispositif de protection contre les surtensions, a jonction plane

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8617565A FR2608319B1 (fr) 1986-12-16 1986-12-16 Dispositif de protection contre les surtensions, a jonction plane

Publications (2)

Publication Number Publication Date
FR2608319A1 FR2608319A1 (fr) 1988-06-17
FR2608319B1 true FR2608319B1 (fr) 1989-04-14

Family

ID=9341935

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8617565A Expired FR2608319B1 (fr) 1986-12-16 1986-12-16 Dispositif de protection contre les surtensions, a jonction plane

Country Status (1)

Country Link
FR (1) FR2608319B1 (fr)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4042949A (en) * 1974-05-08 1977-08-16 Motorola, Inc. Semiconductor devices
DE2916114A1 (de) * 1978-04-21 1979-10-31 Hitachi Ltd Halbleitervorrichtung
JPS5922368A (ja) * 1982-07-28 1984-02-04 Hitachi Ltd ツエナ−ダイオ−ドおよびその製造方法
JPS6097659A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体集積回路
US4732866A (en) * 1984-03-12 1988-03-22 Motorola Inc. Method for producing low noise, high grade constant semiconductor junctions
JPS6115376A (ja) * 1984-07-02 1986-01-23 Toshiba Corp 基準電圧ダイオ−ド
JPS6189666A (ja) * 1984-10-09 1986-05-07 Fujitsu Ltd 半導体装置

Also Published As

Publication number Publication date
FR2608319A1 (fr) 1988-06-17

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Legal Events

Date Code Title Description
ST Notification of lapse