FR2442490A1 - Memoire analogique a deux dimensions - Google Patents

Memoire analogique a deux dimensions

Info

Publication number
FR2442490A1
FR2442490A1 FR7928913A FR7928913A FR2442490A1 FR 2442490 A1 FR2442490 A1 FR 2442490A1 FR 7928913 A FR7928913 A FR 7928913A FR 7928913 A FR7928913 A FR 7928913A FR 2442490 A1 FR2442490 A1 FR 2442490A1
Authority
FR
France
Prior art keywords
vertical
picture
stage
memory
image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7928913A
Other languages
English (en)
Other versions
FR2442490B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2442490A1 publication Critical patent/FR2442490A1/fr
Application granted granted Critical
Publication of FR2442490B1 publication Critical patent/FR2442490B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445—Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information
    • H04N5/45—Picture in picture, e.g. displaying simultaneously another television channel in a region of the screen
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/287—Organisation of a multiplicity of shift registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/04—Shift registers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Shift Register Type Memory (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Studio Circuits (AREA)

Abstract

Mémoire analogiqie utilisable dans un récepteur de télévision pour le stockage temporaire des signaux d'une seconde image qui doit être reproduite sur l'écran dans une petite partie de l'image principale, selon le procédé dit << image dans image >>. L'invention n'utilise qu'un seul circuit integré à transistors MOS constituant des lignes à retard analogiques interconnectées en matrice, une chaîne de transfert L1 pour l'entrée en série de chaque ligne à enregistrer du second signal de télévision, k chaînes Q1 à k pour le décalage vertical des lignes en parallèle et une chaîne de sortie serte L2. Un registre à décalage spécial S1 à 2n permet de produire la commande de transfert vertical jusqu'à un étage quelconque des chaînes verticales et de la supprimer à partir de cet étage, si bien que cette mémoire est équivalente à deux mémoires partielles utilisées en alternance inscription-lecture par demi-images.
FR7928913A 1978-11-25 1979-11-23 Memoire analogique a deux dimensions Granted FR2442490A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2851111A DE2851111C2 (de) 1978-11-25 1978-11-25 Zweidimensionale Analog-Speicheranordnung

Publications (2)

Publication Number Publication Date
FR2442490A1 true FR2442490A1 (fr) 1980-06-20
FR2442490B1 FR2442490B1 (fr) 1983-08-05

Family

ID=6055579

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7928913A Granted FR2442490A1 (fr) 1978-11-25 1979-11-23 Memoire analogique a deux dimensions

Country Status (4)

Country Link
US (1) US4272831A (fr)
JP (1) JPS5574267A (fr)
DE (1) DE2851111C2 (fr)
FR (1) FR2442490A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3047923A1 (de) * 1978-11-25 1982-07-15 Deutsche Itt Industries Gmbh, 7800 Freiburg "steuerschaltung fuer eine zweidimensionale analog-speicheranordnung"
DE3227900C2 (de) * 1982-07-26 1984-12-13 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung mit mehreren in Reihe geschalteten Schieberegisterbausteinen
FR2566162B1 (fr) * 1984-06-13 1986-08-29 Thomson Csf Dispositif memoire d'image analogique utilisant le transfert de charge
JPS6143015A (ja) * 1984-08-07 1986-03-01 Toshiba Corp デ−タ遅延記憶回路
US5504699A (en) * 1994-04-08 1996-04-02 Goller; Stuart E. Nonvolatile magnetic analog memory
GB9517785D0 (en) * 1995-08-31 1995-11-01 Philips Electronics Uk Ltd Current memory
US5874854A (en) * 1997-03-28 1999-02-23 International Business Machines Corporation Control scheme for on-chip capacitor degating
US6212654B1 (en) * 1997-07-22 2001-04-03 Lucent Technologies Inc. Coded modulation for digital storage in analog memory devices
JP2008199892A (ja) * 2008-05-07 2008-08-28 Mitsuba Corp ブラシ装置
TWI673718B (zh) * 2011-05-13 2019-10-01 日商半導體能源研究所股份有限公司 半導體裝置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2628737A1 (de) * 1976-06-25 1978-01-05 Itt Ind Gmbh Deutsche Fernsehempfaenger mit einer einrichtung zur gleichzeitigen wiedergabe mehrerer programme
US4084107A (en) * 1975-12-19 1978-04-11 Hitachi, Ltd. Charge transfer device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4084107A (en) * 1975-12-19 1978-04-11 Hitachi, Ltd. Charge transfer device
DE2628737A1 (de) * 1976-06-25 1978-01-05 Itt Ind Gmbh Deutsche Fernsehempfaenger mit einer einrichtung zur gleichzeitigen wiedergabe mehrerer programme
FR2356331A2 (fr) * 1976-06-25 1978-01-20 Itt Recepteur de television equipe pour recevoir simultanement plusieurs programmes

Also Published As

Publication number Publication date
DE2851111C2 (de) 1980-09-25
DE2851111B1 (de) 1980-02-07
FR2442490B1 (fr) 1983-08-05
JPS5574267A (en) 1980-06-04
US4272831A (en) 1981-06-09

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Legal Events

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