FR2410864B1 - Cellule de memoire permettant des operations d'ecriture et de lecture simultanees - Google Patents
Cellule de memoire permettant des operations d'ecriture et de lecture simultaneesInfo
- Publication number
- FR2410864B1 FR2410864B1 FR7830980A FR7830980A FR2410864B1 FR 2410864 B1 FR2410864 B1 FR 2410864B1 FR 7830980 A FR7830980 A FR 7830980A FR 7830980 A FR7830980 A FR 7830980A FR 2410864 B1 FR2410864 B1 FR 2410864B1
- Authority
- FR
- France
- Prior art keywords
- memory cell
- reading operations
- allowing simultaneous
- simultaneous writing
- cell allowing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/857,831 US4127899A (en) | 1977-12-05 | 1977-12-05 | Self-quenching memory cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2410864A1 FR2410864A1 (fr) | 1979-06-29 |
| FR2410864B1 true FR2410864B1 (fr) | 1985-10-18 |
Family
ID=25326811
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7830980A Expired FR2410864B1 (fr) | 1977-12-05 | 1978-10-24 | Cellule de memoire permettant des operations d'ecriture et de lecture simultanees |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4127899A (fr) |
| JP (1) | JPS5480042A (fr) |
| DE (1) | DE2851518A1 (fr) |
| FR (1) | FR2410864B1 (fr) |
| GB (1) | GB2010037B (fr) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4193127A (en) * | 1979-01-02 | 1980-03-11 | International Business Machines Corporation | Simultaneous read/write cell |
| US4292675A (en) * | 1979-07-30 | 1981-09-29 | International Business Machines Corp. | Five device merged transistor RAM cell |
| JPS5634179A (en) * | 1979-08-24 | 1981-04-06 | Mitsubishi Electric Corp | Control circuit for memory unit |
| US4281401A (en) * | 1979-11-23 | 1981-07-28 | Texas Instruments Incorporated | Semiconductor read/write memory array having high speed serial shift register access |
| US4280197A (en) * | 1979-12-07 | 1981-07-21 | Ibm Corporation | Multiple access store |
| US4287575A (en) * | 1979-12-28 | 1981-09-01 | International Business Machines Corporation | High speed high density, multi-port random access memory cell |
| JPS6057090B2 (ja) * | 1980-09-19 | 1985-12-13 | 株式会社日立製作所 | データ記憶装置およびそれを用いた処理装置 |
| DE3070394D1 (en) * | 1980-11-26 | 1985-05-02 | Ibm Deutschland | Multiple-address highly integrated semi-conductor memory |
| US4491937A (en) * | 1982-02-25 | 1985-01-01 | Trw Inc. | Multiport register file |
| JPH0652530B2 (ja) * | 1982-10-25 | 1994-07-06 | 株式会社日立製作所 | ベクトル・プロセッサ |
| US4922455A (en) * | 1987-09-08 | 1990-05-01 | International Business Machines Corporation | Memory cell with active device for saturation capacitance discharge prior to writing |
| US4991138A (en) * | 1989-04-03 | 1991-02-05 | International Business Machines Corporation | High speed memory cell with multiple port capability |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3675218A (en) * | 1970-01-15 | 1972-07-04 | Ibm | Independent read-write monolithic memory array |
| JPS5249698B2 (fr) * | 1971-12-03 | 1977-12-19 | ||
| US3732440A (en) * | 1971-12-23 | 1973-05-08 | Ibm | Address decoder latch |
| US3919566A (en) * | 1973-12-26 | 1975-11-11 | Motorola Inc | Sense-write circuit for bipolar integrated circuit ram |
| JPS576198B2 (fr) * | 1974-08-09 | 1982-02-03 |
-
1977
- 1977-12-05 US US05/857,831 patent/US4127899A/en not_active Expired - Lifetime
-
1978
- 1978-10-17 JP JP12694378A patent/JPS5480042A/ja active Pending
- 1978-10-24 FR FR7830980A patent/FR2410864B1/fr not_active Expired
- 1978-11-07 GB GB7843515A patent/GB2010037B/en not_active Expired
- 1978-11-29 DE DE19782851518 patent/DE2851518A1/de not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| GB2010037B (en) | 1982-05-26 |
| GB2010037A (en) | 1979-06-20 |
| JPS5480042A (en) | 1979-06-26 |
| US4127899A (en) | 1978-11-28 |
| FR2410864A1 (fr) | 1979-06-29 |
| DE2851518A1 (de) | 1979-06-07 |
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| JPS52143118A (en) | Writing pen tip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |