FR2393469A1 - Circuit a bascule - Google Patents

Circuit a bascule

Info

Publication number
FR2393469A1
FR2393469A1 FR7737112A FR7737112A FR2393469A1 FR 2393469 A1 FR2393469 A1 FR 2393469A1 FR 7737112 A FR7737112 A FR 7737112A FR 7737112 A FR7737112 A FR 7737112A FR 2393469 A1 FR2393469 A1 FR 2393469A1
Authority
FR
France
Prior art keywords
gates
circuit
wired
hard
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7737112A
Other languages
English (en)
Other versions
FR2393469B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of FR2393469A1 publication Critical patent/FR2393469A1/fr
Application granted granted Critical
Publication of FR2393469B1 publication Critical patent/FR2393469B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0372—Bistable circuits of the master-slave type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

Un circuit à bascule comprend une partie maître et une partie esclave 10, 20 et réagit à des signaux d'entrée de données J, K ainsi qu'à des signaux d'horloge vrais et complémentaires CL, CL. La partie maître 10 comprend trois portes OU 12, 16, 18 et une porte OU supplémentaire 14 qui est indépendante des signaux d'horloge. Les sorties des quatre portes OU sont connectées à un circuit ET câblé 30 pour fournir un signal de sortie maître Q qui est connecté à la partie esclave 20. La partie esclave 20 comprend deux portes OU 22, 26 ainsi qu'une porte OU supplémentaire 24 pouvant être commandée indépendamment des signaux d'horloge, les sorties vrais des trois portes OU 22, 24, 26 étant couplées à un circuit ET câblé 32 pour fournir un signal de sortie de bascule Qo et les sorties complémentaires étant couplées à un circuit OU câblé 34 pour fournir un signal de sortie complémentaire Qo .
FR7737112A 1976-12-10 1977-12-09 Circuit a bascule Granted FR2393469A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/749,490 US4072869A (en) 1976-12-10 1976-12-10 Hazard-free clocked master/slave flip-flop

Publications (2)

Publication Number Publication Date
FR2393469A1 true FR2393469A1 (fr) 1978-12-29
FR2393469B1 FR2393469B1 (fr) 1982-10-22

Family

ID=25013959

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7737112A Granted FR2393469A1 (fr) 1976-12-10 1977-12-09 Circuit a bascule

Country Status (5)

Country Link
US (1) US4072869A (fr)
JP (1) JPS5372558A (fr)
DE (1) DE2755070C2 (fr)
FR (1) FR2393469A1 (fr)
GB (1) GB1570549A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4570082A (en) * 1983-11-25 1986-02-11 International Business Machines Corporation Single clocked latch circuit
US4607173A (en) * 1984-03-14 1986-08-19 At&T Bell Laboratories Dual-clock edge triggered flip-flop circuits
US4868420A (en) * 1985-01-23 1989-09-19 Hitachi, Ltd. Flip-flop circuit
US5322812A (en) * 1991-03-20 1994-06-21 Crosspoint Solutions, Inc. Improved method of fabricating antifuses in an integrated circuit device and resulting structure
JP3279337B2 (ja) * 1991-04-12 2002-04-30 ヒューレット・パッカード・カンパニー ねずみ取り論理回路用万能パイプラインラッチ
FR2711286B1 (fr) * 1993-10-11 1996-01-05 Sgs Thomson Microelectronics Dispositif de surveillance du déphasage entre deux signaux d'horloge.
US7634749B1 (en) * 2005-04-01 2009-12-15 Cadence Design Systems, Inc. Skew insensitive clocking method and apparatus
CN107317579B (zh) * 2017-07-10 2024-02-23 宗仁科技(平潭)股份有限公司 一种芯片的功能切换控制电路及芯片

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3917959A (en) * 1974-05-02 1975-11-04 Motorola Inc High speed counter latch circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL6605606A (fr) * 1966-04-27 1967-10-30
FR1545421A (fr) * 1966-11-29
US3440449A (en) * 1966-12-07 1969-04-22 Motorola Inc Gated dc coupled j-k flip-flop
US3701104A (en) * 1968-09-06 1972-10-24 Singer Co Address synchronizer
US3575608A (en) * 1969-07-29 1971-04-20 Rca Corp Circuit for detecting a change in voltage level in either sense
US3609569A (en) * 1970-07-09 1971-09-28 Solid State Scient Devices Cor Logic system
DE2047945A1 (de) * 1970-09-29 1972-04-06 Siemens Ag Anordnung zur Erzielung von taktflankengesteuertem Verhalten bei taktzustands gesteuerten bistabilen Kippstufen
US3812388A (en) * 1972-09-28 1974-05-21 Ibm Synchronized static mosfet latch
GB1494481A (en) * 1973-12-21 1977-12-07 Mullard Ltd Electrical circuits comprising master/slave bistable arrangements
US3917961A (en) * 1974-06-03 1975-11-04 Motorola Inc Current switch emitter follower master-slave flip-flop

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3917959A (en) * 1974-05-02 1975-11-04 Motorola Inc High speed counter latch circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/76 *

Also Published As

Publication number Publication date
DE2755070A1 (de) 1978-06-15
JPS5372558A (en) 1978-06-28
GB1570549A (en) 1980-07-02
DE2755070C2 (de) 1982-03-25
US4072869A (en) 1978-02-07
FR2393469B1 (fr) 1982-10-22

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Legal Events

Date Code Title Description
ST Notification of lapse