FR2376516A1 - Dispositif pour coupler des transistors, operant suivant la technique i2l, a un transistor dont le courant de repos est regle sur une forte intensite - Google Patents

Dispositif pour coupler des transistors, operant suivant la technique i2l, a un transistor dont le courant de repos est regle sur une forte intensite

Info

Publication number
FR2376516A1
FR2376516A1 FR7739602A FR7739602A FR2376516A1 FR 2376516 A1 FR2376516 A1 FR 2376516A1 FR 7739602 A FR7739602 A FR 7739602A FR 7739602 A FR7739602 A FR 7739602A FR 2376516 A1 FR2376516 A1 FR 2376516A1
Authority
FR
France
Prior art keywords
technique
operating according
transistor whose
high intensity
idle current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7739602A
Other languages
English (en)
Other versions
FR2376516B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of FR2376516A1 publication Critical patent/FR2376516A1/fr
Application granted granted Critical
Publication of FR2376516B1 publication Critical patent/FR2376516B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01818—Interface arrangements for integrated injection logic (I2L)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H01L27/0244—I2L structures integrated in combination with analog structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821—Combination of lateral and vertical transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Processing Of Color Television Signals (AREA)
  • Electronic Switches (AREA)

Abstract

L'invention permet d'établir le couplage entre d'une part un transistor fonctionnant suivant la technique I**2L et d'autre part un transistor dont l'intensité du courant de repos est ajuste sur une valeur plus élevée Pour cela, l'invention préconise l'emploi d'un élément de couplage réalisé dans un seul îlot et comportant un injecteur de courant combiné avec un transistor vertical excité dans le sens normal. Application aux circuits analogiques.
FR7739602A 1976-12-31 1977-12-29 Dispositif pour coupler des transistors, operant suivant la technique i2l, a un transistor dont le courant de repos est regle sur une forte intensite Granted FR2376516A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7614610A NL7614610A (nl) 1976-12-31 1976-12-31 Inrichting voor het koppelen van in i2l techniek bedreven transistoren met een op hogere rust- stroom ingestelde transistor.

Publications (2)

Publication Number Publication Date
FR2376516A1 true FR2376516A1 (fr) 1978-07-28
FR2376516B1 FR2376516B1 (fr) 1983-11-18

Family

ID=19827474

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7739602A Granted FR2376516A1 (fr) 1976-12-31 1977-12-29 Dispositif pour coupler des transistors, operant suivant la technique i2l, a un transistor dont le courant de repos est regle sur une forte intensite

Country Status (11)

Country Link
US (1) US4158146A (fr)
JP (1) JPS5385183A (fr)
AU (1) AU505794B2 (fr)
CA (1) CA1091308A (fr)
DE (1) DE2756535C2 (fr)
ES (1) ES465557A1 (fr)
FR (1) FR2376516A1 (fr)
GB (1) GB1548118A (fr)
MX (1) MX144142A (fr)
NL (1) NL7614610A (fr)
PT (1) PT67479B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2513810A1 (fr) * 1981-09-25 1983-04-01 Hitachi Ltd Dispositif a circuits integres a semiconducteurs et procede de fabrication de ce dispositif

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4348600A (en) * 1978-02-14 1982-09-07 Motorola, Inc. Controlled current source for I2 L to analog interfaces
JPS55145363A (en) * 1979-04-27 1980-11-12 Toshiba Corp Semiconductor device
JPS5761336A (en) * 1980-09-30 1982-04-13 Toshiba Corp Output protection circuit of integrated injection logical circuit
US4412142A (en) * 1980-12-24 1983-10-25 General Electric Company Integrated circuit incorporating low voltage and high voltage semiconductor devices
DE3640276A1 (de) * 1986-11-25 1988-06-09 Telefunken Electronic Gmbh Digital-analogwandler

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2111861A1 (fr) * 1970-10-27 1972-06-09 Ericsson Telefon Ab L M

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7107040A (fr) * 1971-05-22 1972-11-24
FR2244262B1 (fr) * 1973-09-13 1978-09-29 Radiotechnique Compelec
DE2450408A1 (de) * 1974-10-23 1976-04-29 Siemens Ag Schaltungsanordnung in einer komplementaer-chl-technik
NL7414273A (nl) * 1974-11-01 1976-05-04 Philips Nv Logische schakeling.
US4053923A (en) * 1976-09-23 1977-10-11 Motorola, Inc. Integrated logic elements with improved speed-power characteristics

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2111861A1 (fr) * 1970-10-27 1972-06-09 Ericsson Telefon Ab L M

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2513810A1 (fr) * 1981-09-25 1983-04-01 Hitachi Ltd Dispositif a circuits integres a semiconducteurs et procede de fabrication de ce dispositif

Also Published As

Publication number Publication date
GB1548118A (en) 1979-07-04
CA1091308A (fr) 1980-12-09
ES465557A1 (es) 1978-10-01
DE2756535A1 (de) 1978-07-06
JPS5385183A (en) 1978-07-27
MX144142A (es) 1981-08-31
PT67479A (fr) 1978-01-01
AU3208377A (en) 1979-07-05
US4158146A (en) 1979-06-12
JPS5517490B2 (fr) 1980-05-12
DE2756535C2 (de) 1985-06-13
AU505794B2 (en) 1979-11-29
NL7614610A (nl) 1978-07-04
PT67479B (fr) 1979-05-30
FR2376516B1 (fr) 1983-11-18

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Legal Events

Date Code Title Description
ST Notification of lapse