FR2338546A1 - Cellule de memoire bipolaire en logique a injection integree a injecteurs lateraux et verticaux - Google Patents

Cellule de memoire bipolaire en logique a injection integree a injecteurs lateraux et verticaux

Info

Publication number
FR2338546A1
FR2338546A1 FR7701085A FR7701085A FR2338546A1 FR 2338546 A1 FR2338546 A1 FR 2338546A1 FR 7701085 A FR7701085 A FR 7701085A FR 7701085 A FR7701085 A FR 7701085A FR 2338546 A1 FR2338546 A1 FR 2338546A1
Authority
FR
France
Prior art keywords
lateral
memory cell
integrated injection
injection logic
bipolar memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7701085A
Other languages
English (en)
Inventor
San U Aung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Publication of FR2338546A1 publication Critical patent/FR2338546A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H01L27/0237—Integrated injection logic structures [I2L] using vertical injector structures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
FR7701085A 1976-01-15 1977-01-14 Cellule de memoire bipolaire en logique a injection integree a injecteurs lateraux et verticaux Withdrawn FR2338546A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US64930576A 1976-01-15 1976-01-15

Publications (1)

Publication Number Publication Date
FR2338546A1 true FR2338546A1 (fr) 1977-08-12

Family

ID=24604238

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7701085A Withdrawn FR2338546A1 (fr) 1976-01-15 1977-01-14 Cellule de memoire bipolaire en logique a injection integree a injecteurs lateraux et verticaux

Country Status (5)

Country Link
US (1) US4144586A (fr)
DE (1) DE2700587A1 (fr)
FR (1) FR2338546A1 (fr)
GB (1) GB1540051A (fr)
IT (1) IT1077581B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0006702A1 (fr) * 1978-06-14 1980-01-09 Nippon Telegraph and Telephone Public Corporation Circuit intégré semiconducteur à mémoire
EP0021393A1 (fr) * 1979-06-29 1981-01-07 International Business Machines Corporation Dispositif semiconducteur comportant des paires de transistors verticaux complémentaires bipolaires et procédé pour sa fabrication

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4257059A (en) * 1978-12-20 1981-03-17 Fairchild Camera And Instrument Corp. Inverse transistor coupled memory cell
US4400712A (en) * 1981-02-13 1983-08-23 Bell Telephone Laboratories, Incorporated Static bipolar random access memory
US4387445A (en) * 1981-02-24 1983-06-07 International Business Machines Corporation Random access memory cell
DE3174546D1 (en) * 1981-05-30 1986-06-12 Ibm Deutschland High-speed large-scale integrated memory with bipolar transistors
EP0090665B1 (fr) * 1982-03-30 1989-05-31 Fujitsu Limited Dispositif semi-conducteur à mémoire
US4813017A (en) * 1985-10-28 1989-03-14 International Business Machines Corportion Semiconductor memory device and array
US5276638A (en) * 1991-07-31 1994-01-04 International Business Machines Corporation Bipolar memory cell with isolated PNP load

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2138905A1 (fr) * 1971-05-22 1973-01-05 Philips Nv
FR2183708A2 (fr) * 1968-12-30 1973-12-21 Ibm
DE2556668A1 (de) * 1974-12-16 1976-06-24 Mitsubishi Electric Corp Halbleiter-speichervorrichtung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3815106A (en) * 1972-05-11 1974-06-04 S Wiedmann Flip-flop memory cell arrangement
US3643235A (en) * 1968-12-30 1972-02-15 Ibm Monolithic semiconductor memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2183708A2 (fr) * 1968-12-30 1973-12-21 Ibm
FR2138905A1 (fr) * 1971-05-22 1973-01-05 Philips Nv
DE2556668A1 (de) * 1974-12-16 1976-06-24 Mitsubishi Electric Corp Halbleiter-speichervorrichtung

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0006702A1 (fr) * 1978-06-14 1980-01-09 Nippon Telegraph and Telephone Public Corporation Circuit intégré semiconducteur à mémoire
EP0021393A1 (fr) * 1979-06-29 1981-01-07 International Business Machines Corporation Dispositif semiconducteur comportant des paires de transistors verticaux complémentaires bipolaires et procédé pour sa fabrication

Also Published As

Publication number Publication date
IT1077581B (it) 1985-05-04
GB1540051A (en) 1979-02-07
US4144586A (en) 1979-03-13
DE2700587A1 (de) 1977-07-21

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Legal Events

Date Code Title Description
ST Notification of lapse