FR2330077A1 - Data processing control with priority interrupt - interrupt unit controls peripheral operations in either simplex or multiplex mode - Google Patents

Data processing control with priority interrupt - interrupt unit controls peripheral operations in either simplex or multiplex mode

Info

Publication number
FR2330077A1
FR2330077A1 FR7513206A FR7513206A FR2330077A1 FR 2330077 A1 FR2330077 A1 FR 2330077A1 FR 7513206 A FR7513206 A FR 7513206A FR 7513206 A FR7513206 A FR 7513206A FR 2330077 A1 FR2330077 A1 FR 2330077A1
Authority
FR
France
Prior art keywords
interrupt
priority
simplex
data processing
unit controls
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7513206A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19742420763 external-priority patent/DE2420763C3/en
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2330077A1 publication Critical patent/FR2330077A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Computer And Data Communications (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

The main memory store of a data processing system is coupled via a main memory coordinator to an input/output processor and a central processor. Both processors are in direct communication with each other and the coordinator. The input/output processor has a large number of outputs coupled to peripheral equipment. The outputs may either operate in simplex or multiplex modes and each has facility for interrupt on a priority basis. The main memory store contains the priority interrupt requirements and the central processor provides the necessary decision making facility. Priority networks linked to the input/output processor operate with multiplexing circuits and a demultiplexer in conjunction with an address register.
FR7513206A 1974-04-29 1975-04-28 Data processing control with priority interrupt - interrupt unit controls peripheral operations in either simplex or multiplex mode Withdrawn FR2330077A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742420763 DE2420763C3 (en) 1974-04-29 Data processing system, in particular process computer system

Publications (1)

Publication Number Publication Date
FR2330077A1 true FR2330077A1 (en) 1977-05-27

Family

ID=5914272

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7513206A Withdrawn FR2330077A1 (en) 1974-04-29 1975-04-28 Data processing control with priority interrupt - interrupt unit controls peripheral operations in either simplex or multiplex mode

Country Status (1)

Country Link
FR (1) FR2330077A1 (en)

Also Published As

Publication number Publication date
DE2420763A1 (en) 1975-10-30
DE2420763B2 (en) 1976-09-23

Similar Documents

Publication Publication Date Title
JPS5668859A (en) Communication system between computer systems
WO1985002038A2 (en) Microcomputer
AU585076B2 (en) Interrupt handling in a multiprocessor computing system
SE7905437L (en) TIME MULTIPLEX SYSTEM
US3300764A (en) Data processor
ES378182A1 (en) Electronic data processing system with plural independent control units
GB1415022A (en) Multiplex apparatus for data transfer with a data processor and communication lines
GB1010179A (en) Data processing system
JPS52119832A (en) Electroinc calculator of microprogram control system
FR2330077A1 (en) Data processing control with priority interrupt - interrupt unit controls peripheral operations in either simplex or multiplex mode
JPS575162A (en) Redundant system controller
FR2315736A1 (en) Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators
ES8502273A1 (en) Multiprocessor memory map.
FR2315815A1 (en) Switching system for telephone exchange - uses standby spares to replace failed switch groups and is controlled by data processor which reassigns transmission channels
JPS57166759A (en) Controlling method for common input/output bus
JPS5310912A (en) Two-way multiplex transmission control system
JPS575141A (en) Bus control system
JPS5643850A (en) Intermultiplexer communication control system
JPS52154981A (en) Remote monitoring control system
JPS5789175A (en) Data processing control system
JPS56110362A (en) Circuit conversion system
NL7900506A (en) Data processing system with function processor in parallel - has local memories connected to common bus linked to peripherals via input-output unit
JPS57136239A (en) Device address switching system
FR2324184A1 (en) Digital data communication switching control unit - has two processors with one processor operating as a decision table
SU947849A1 (en) Interface

Legal Events

Date Code Title Description
ST Notification of lapse