FR2325107A1 - Minicomputer asynchronous memory control system - has several memory module and single toway common lines such that max. data transfer is achieved with min. signalling lines - Google Patents
Minicomputer asynchronous memory control system - has several memory module and single toway common lines such that max. data transfer is achieved with min. signalling linesInfo
- Publication number
- FR2325107A1 FR2325107A1 FR7620850A FR7620850A FR2325107A1 FR 2325107 A1 FR2325107 A1 FR 2325107A1 FR 7620850 A FR7620850 A FR 7620850A FR 7620850 A FR7620850 A FR 7620850A FR 2325107 A1 FR2325107 A1 FR 2325107A1
- Authority
- FR
- France
- Prior art keywords
- memory
- unit
- lines
- toway
- minicomputer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Abstract
The asynchronous memory system has a memory unit and a memory control associated with the memory unit. Receiving means in the memory control, receive mode control signals emanating from a unit external to the memory. There signals indicate the reading, writing and increase/decrease modes of operation. The memory system has means for producing a memory signal in response to each of the mode control signals. A single path is used for transmission of all the control signals from the memory control to the unit external to the memory. The system includes several memory controls each associated with a memory unit. The external unit is a central data processor or a data channel. The memory signal is a first transition from a lower to an upper voltage level, which indicates recognition of reception of mode control signals.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US59395375A | 1975-07-08 | 1975-07-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2325107A1 true FR2325107A1 (en) | 1977-04-15 |
Family
ID=24376905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7620850A Withdrawn FR2325107A1 (en) | 1975-07-08 | 1976-07-08 | Minicomputer asynchronous memory control system - has several memory module and single toway common lines such that max. data transfer is achieved with min. signalling lines |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS5255834A (en) |
CA (1) | CA1062376A (en) |
DE (1) | DE2630711A1 (en) |
FR (1) | FR2325107A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2404878A1 (en) * | 1977-09-30 | 1979-04-27 | Siemens Ag | ASSEMBLY FOR INTERRUPTION INSTRUCTION ENTRY AND INTERRUPTION ACKNOWLEDGMENT RELEASE FOR COMPUTER SYSTEMS |
FR2425184A1 (en) * | 1978-05-05 | 1979-11-30 | Hisi Spa | BIDIRECTIONAL TRAP SIGNAL TRANSMISSION SYSTEM |
FR2511790A1 (en) * | 1981-08-24 | 1983-02-25 | Sony Corp | DATA TRANSFER APPARATUS FOR A MICROCALCULATOR DEVICE |
EP0258873A2 (en) * | 1986-09-01 | 1988-03-09 | Nec Corporation | Serial bus interface system for data communication using two-wire line as clock bus and data bus |
-
1976
- 1976-07-06 CA CA256,436A patent/CA1062376A/en not_active Expired
- 1976-07-08 FR FR7620850A patent/FR2325107A1/en not_active Withdrawn
- 1976-07-08 JP JP8143876A patent/JPS5255834A/en active Pending
- 1976-07-08 DE DE19762630711 patent/DE2630711A1/en active Pending
Non-Patent Citations (1)
Title |
---|
NO002867 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2404878A1 (en) * | 1977-09-30 | 1979-04-27 | Siemens Ag | ASSEMBLY FOR INTERRUPTION INSTRUCTION ENTRY AND INTERRUPTION ACKNOWLEDGMENT RELEASE FOR COMPUTER SYSTEMS |
FR2425184A1 (en) * | 1978-05-05 | 1979-11-30 | Hisi Spa | BIDIRECTIONAL TRAP SIGNAL TRANSMISSION SYSTEM |
FR2511790A1 (en) * | 1981-08-24 | 1983-02-25 | Sony Corp | DATA TRANSFER APPARATUS FOR A MICROCALCULATOR DEVICE |
EP0258873A2 (en) * | 1986-09-01 | 1988-03-09 | Nec Corporation | Serial bus interface system for data communication using two-wire line as clock bus and data bus |
EP0258873A3 (en) * | 1986-09-01 | 1989-11-02 | Nec Corporation | Serial bus interface system for data communication usingserial bus interface system for data communication using two-wire line as clock bus and data bus two-wire line as clock bus and data bus |
Also Published As
Publication number | Publication date |
---|---|
JPS5255834A (en) | 1977-05-07 |
CA1062376A (en) | 1979-09-11 |
DE2630711A1 (en) | 1977-10-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1308974A (en) | Electronic voice annunciating device | |
GB1074514A (en) | Improvements in or relating to telegraph receiving apparatus | |
FR2325107A1 (en) | Minicomputer asynchronous memory control system - has several memory module and single toway common lines such that max. data transfer is achieved with min. signalling lines | |
GB1159787A (en) | Signalling Apparatus | |
FR2446554A1 (en) | Monitoring and control circuit for vehicle services - uses single wire for transmitted and received data and for power | |
AU6672681A (en) | Data transmission | |
ES457007A1 (en) | Data processing system with improved read/write capability | |
JPS5671358A (en) | Control system for button telephone | |
GB1176510A (en) | Improvements in or relating to electrical time division communication systems | |
JPS56116349A (en) | Information transmission system | |
JPS56101229A (en) | Computer system | |
GR862299B (en) | Switch arrangement for transmitting data signs between control arrangements connected by ring main systems | |
GB1154678A (en) | A Remote Control System for Transmission of Data. | |
JPS57184354A (en) | Digital transmitter | |
FR2431734A1 (en) | Digital data communication system - allows communication at chosen speed between peripheral couplers and central processing unit | |
JPS578855A (en) | Interruption processing system | |
FR2397019A1 (en) | Microprocessor data processing system - has automatic shifter activated by timing signal independent of microprocessor timing signal | |
CA747011A (en) | Regulating circuit for an information signal receiver | |
JPS5779517A (en) | Heating device | |
JPS5643896A (en) | Key telephone control circuit | |
JPS56152051A (en) | Asynchronous microprogram control system | |
ES286232A1 (en) | Installation of exit circuit for railway control systems (Machine-translation by Google Translate, not legally binding) | |
JPS5755446A (en) | Check system for digital transfer data | |
JPS5754449A (en) | Circuit device in slave station for time division multiplex signal transmission system | |
JPS6086607A (en) | Sequence control system of data process |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |