FR2309014B3 - - Google Patents
Info
- Publication number
- FR2309014B3 FR2309014B3 FR7611404A FR7611404A FR2309014B3 FR 2309014 B3 FR2309014 B3 FR 2309014B3 FR 7611404 A FR7611404 A FR 7611404A FR 7611404 A FR7611404 A FR 7611404A FR 2309014 B3 FR2309014 B3 FR 2309014B3
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356017—Bistable circuits using additional transistors in the input circuit
- H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356086—Bistable circuits with additional means for controlling the main nodes
- H03K3/356095—Bistable circuits with additional means for controlling the main nodes with synchronous operation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/569,927 US3978459A (en) | 1975-04-21 | 1975-04-21 | High density mos memory array |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2309014A1 FR2309014A1 (fr) | 1976-11-19 |
| FR2309014B3 true FR2309014B3 (enExample) | 1979-01-12 |
Family
ID=24277487
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7611404A Granted FR2309014A1 (fr) | 1975-04-21 | 1976-04-16 | Matrice de memoire mos a forte densite |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US3978459A (enExample) |
| DE (1) | DE2614297A1 (enExample) |
| FR (1) | FR2309014A1 (enExample) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4131951A (en) * | 1976-05-17 | 1978-12-26 | Tokyo Shibaura Electric Co., Ltd. | High speed complementary MOS memory |
| US4028557A (en) * | 1976-05-21 | 1977-06-07 | Bell Telephone Laboratories, Incorporated | Dynamic sense-refresh detector amplifier |
| DE2623219B2 (de) * | 1976-05-24 | 1978-10-12 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Betreiben einer Leseverstärkerschaltung für einen dynamischen MOS-Speicher und Anordnung zur Durchführung dieses Verfahrens |
| US4508980A (en) * | 1976-11-11 | 1985-04-02 | Signetics Corporation | Sense and refresh amplifier circuit |
| DE2807181C2 (de) * | 1977-02-21 | 1985-11-28 | Zaidan Hojin Handotai Kenkyu Shinkokai, Sendai, Miyagi | Halbleiterspeichervorrichtung |
| US4162540A (en) * | 1978-03-20 | 1979-07-24 | Fujitsu Limited | Clocked memory with delay establisher by drive transistor design |
| US4239990A (en) * | 1978-09-07 | 1980-12-16 | Texas Instruments Incorporated | Clock voltage generator for semiconductor memory with reduced power dissipation |
| JPS5833635B2 (ja) * | 1979-12-25 | 1983-07-21 | 富士通株式会社 | 半導体記憶装置 |
| JPS56117390A (en) * | 1980-02-16 | 1981-09-14 | Fujitsu Ltd | Semiconductor memory device |
| US4395765A (en) * | 1981-04-23 | 1983-07-26 | Bell Telephone Laboratories, Incorporated | Multiport memory array |
| US4769564A (en) * | 1987-05-15 | 1988-09-06 | Analog Devices, Inc. | Sense amplifier |
| JPH05342872A (ja) * | 1992-06-05 | 1993-12-24 | Oki Micro Design Miyazaki:Kk | 半導体記憶装置 |
| KR970001344B1 (ko) * | 1993-07-12 | 1997-02-05 | 삼성전자 주식회사 | 반도체 메모리 장치 |
| JP3584338B2 (ja) * | 1994-03-03 | 2004-11-04 | ローム・ユーエスエー・インク | 電気的に消去及びプログラム可能なデバイスの消去方法 |
| US5828239A (en) * | 1997-04-14 | 1998-10-27 | International Business Machines Corporation | Sense amplifier circuit with minimized clock skew effect |
| JP6122801B2 (ja) * | 2014-03-13 | 2017-04-26 | 株式会社東芝 | 半導体記憶装置 |
| FR3152460A1 (fr) | 2023-08-28 | 2025-03-07 | Psa Automobiles Sa | Surveillance du placement dans l’état bloqué d’un différentiel couplé à une machine motrice électrique d’un véhicule terrestre |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3769621A (en) * | 1966-06-23 | 1973-10-30 | Hewlett Packard Co | Calculator with provision for automatically interposing memory accesscycles between other wise regularly recurring logic cycles |
| US3806898A (en) * | 1973-06-29 | 1974-04-23 | Ibm | Regeneration of dynamic monolithic memories |
-
1975
- 1975-04-21 US US05/569,927 patent/US3978459A/en not_active Expired - Lifetime
-
1976
- 1976-04-02 DE DE19762614297 patent/DE2614297A1/de active Pending
- 1976-04-16 FR FR7611404A patent/FR2309014A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE2614297A1 (de) | 1976-11-04 |
| FR2309014A1 (fr) | 1976-11-19 |
| US3978459A (en) | 1976-08-31 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |