FR2307400B3 - - Google Patents
Info
- Publication number
- FR2307400B3 FR2307400B3 FR7610586A FR7610586A FR2307400B3 FR 2307400 B3 FR2307400 B3 FR 2307400B3 FR 7610586 A FR7610586 A FR 7610586A FR 7610586 A FR7610586 A FR 7610586A FR 2307400 B3 FR2307400 B3 FR 2307400B3
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DD18533075A DD124408A3 (en) | 1975-04-09 | 1975-04-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2307400A1 FR2307400A1 (en) | 1976-11-05 |
| FR2307400B3 true FR2307400B3 (en) | 1979-07-13 |
Family
ID=5499862
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7610586A Granted FR2307400A1 (en) | 1975-04-09 | 1976-04-09 | Split-phase signal demodulator - includes null detector having pulse output applied to sampling circuit |
Country Status (6)
| Country | Link |
|---|---|
| CS (1) | CS208367B1 (en) |
| DD (1) | DD124408A3 (en) |
| DE (1) | DE2610687A1 (en) |
| FR (1) | FR2307400A1 (en) |
| NL (1) | NL7603667A (en) |
| SU (1) | SU665319A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| ZA81781B (en) * | 1980-02-13 | 1982-03-31 | Int Computers Ltd | Digital systems |
| HU183139B (en) * | 1980-05-14 | 1984-04-28 | Magyar Optikai Muevek | Electronic decoding circuit arrangement for systems with self-synchronization |
-
1975
- 1975-04-09 DD DD18533075A patent/DD124408A3/xx unknown
-
1976
- 1976-03-13 DE DE19762610687 patent/DE2610687A1/en not_active Withdrawn
- 1976-04-02 CS CS216576A patent/CS208367B1/en unknown
- 1976-04-07 NL NL7603667A patent/NL7603667A/en not_active Application Discontinuation
- 1976-04-09 FR FR7610586A patent/FR2307400A1/en active Granted
- 1976-04-09 SU SU762344806A patent/SU665319A1/en active
Also Published As
| Publication number | Publication date |
|---|---|
| NL7603667A (en) | 1976-10-12 |
| DD124408A3 (en) | 1977-02-23 |
| CS208367B1 (en) | 1981-09-15 |
| SU665319A1 (en) | 1979-05-30 |
| FR2307400A1 (en) | 1976-11-05 |
| DE2610687A1 (en) | 1977-01-20 |