FR2290760B1 - - Google Patents

Info

Publication number
FR2290760B1
FR2290760B1 FR7529324A FR7529324A FR2290760B1 FR 2290760 B1 FR2290760 B1 FR 2290760B1 FR 7529324 A FR7529324 A FR 7529324A FR 7529324 A FR7529324 A FR 7529324A FR 2290760 B1 FR2290760 B1 FR 2290760B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7529324A
Other versions
FR2290760A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2290760A1 publication Critical patent/FR2290760A1/fr
Application granted granted Critical
Publication of FR2290760B1 publication Critical patent/FR2290760B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Non-Volatile Memory (AREA)
FR7529324A 1974-11-06 1975-09-19 Transistor a effet de champ a porte en silicium, auto-aligne et son procede de fabrication Granted FR2290760A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/521,423 US3943542A (en) 1974-11-06 1974-11-06 High reliability, low leakage, self-aligned silicon gate FET and method of fabricating same

Publications (2)

Publication Number Publication Date
FR2290760A1 FR2290760A1 (fr) 1976-06-04
FR2290760B1 true FR2290760B1 (fr) 1978-04-07

Family

ID=24076672

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7529324A Granted FR2290760A1 (fr) 1974-11-06 1975-09-19 Transistor a effet de champ a porte en silicium, auto-aligne et son procede de fabrication

Country Status (5)

Country Link
US (1) US3943542A (fr)
JP (1) JPS5169372A (fr)
DE (1) DE2546314A1 (fr)
FR (1) FR2290760A1 (fr)
GB (1) GB1501249A (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928992B2 (ja) * 1975-02-14 1984-07-17 日本電信電話株式会社 Ｍｏｓトランジスタおよびその製造方法
US4017888A (en) * 1975-12-31 1977-04-12 International Business Machines Corporation Non-volatile metal nitride oxide semiconductor device
JPS5293278A (en) * 1976-01-30 1977-08-05 Matsushita Electronics Corp Manufacture for mos type semiconductor intergrated circuit
JPS5324281A (en) * 1976-08-19 1978-03-06 Sony Corp Production of insulated gate type field effect transistors
JPS54128293A (en) * 1978-03-29 1979-10-04 Hitachi Ltd Manufacture of semiconductor device especially for insulator gate type semiconductor device
US4277881A (en) * 1978-05-26 1981-07-14 Rockwell International Corporation Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4441941A (en) * 1980-03-06 1984-04-10 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device employing element isolation using insulating materials
US4287661A (en) * 1980-03-26 1981-09-08 International Business Machines Corporation Method for making an improved polysilicon conductor structure utilizing reactive-ion etching and thermal oxidation
JPS5779643A (en) * 1980-11-06 1982-05-18 Toshiba Corp Semiconductor device
DE3168688D1 (en) * 1980-11-06 1985-03-14 Toshiba Kk Method for manufacturing a semiconductor device
US4415383A (en) * 1982-05-10 1983-11-15 Northern Telecom Limited Method of fabricating semiconductor devices using laser annealing
JPS58209140A (ja) * 1982-05-31 1983-12-06 Nec Corp 半導体装置の製造法
US4751554A (en) * 1985-09-27 1988-06-14 Rca Corporation Silicon-on-sapphire integrated circuit and method of making the same
US4758529A (en) * 1985-10-31 1988-07-19 Rca Corporation Method of forming an improved gate dielectric for a MOSFET on an insulating substrate
JPS61190975A (ja) * 1986-02-21 1986-08-25 Sony Corp 絶縁ゲート型電界効果トランジスタの製法
US4722912A (en) * 1986-04-28 1988-02-02 Rca Corporation Method of forming a semiconductor structure
US4735917A (en) * 1986-04-28 1988-04-05 General Electric Company Silicon-on-sapphire integrated circuits
US4755481A (en) * 1986-05-15 1988-07-05 General Electric Company Method of making a silicon-on-insulator transistor
US6780718B2 (en) 1993-11-30 2004-08-24 Stmicroelectronics, Inc. Transistor structure and method for making same
US5406515A (en) * 1993-12-01 1995-04-11 International Business Machines Corporation Method for fabricating low leakage substrate plate trench DRAM cells and devices formed thereby
US6355580B1 (en) 1998-09-03 2002-03-12 Micron Technology, Inc. Ion-assisted oxidation methods and the resulting structures
US6200843B1 (en) 1998-09-24 2001-03-13 International Business Machines Corporation High-voltage, high performance FETs
US5981368A (en) * 1998-11-05 1999-11-09 Advanced Micro Devices Enhanced shallow junction design by polysilicon line width reduction using oxidation with integrated spacer formation
JP4734393B2 (ja) * 2008-10-03 2011-07-27 間機設工業株式会社 汚泥等回収装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS497870B1 (fr) * 1969-06-06 1974-02-22
US3633078A (en) * 1969-10-24 1972-01-04 Hughes Aircraft Co Stable n-channel tetrode
FR2103427A1 (fr) * 1970-08-21 1972-04-14 Motorola Inc
US3761327A (en) * 1971-03-19 1973-09-25 Itt Planar silicon gate mos process
US3751722A (en) * 1971-04-30 1973-08-07 Standard Microsyst Smc Mos integrated circuit with substrate containing selectively formed resistivity regions
NL160988C (nl) * 1971-06-08 1979-12-17 Philips Nv Halfgeleiderinrichting met een halfgeleiderlichaam, be- vattende ten minste een eerste veldeffecttransistor met geisoleerde stuurelektrode en werkwijze voor de vervaar- diging van de halfgeleiderinrichting.
JPS53674B2 (fr) * 1971-12-23 1978-01-11
DE2314260A1 (de) * 1972-05-30 1973-12-13 Ibm Ladungsgekoppelte halbleiteranordnung und verfahren zu ihrer herstellung
US3883372A (en) * 1973-07-11 1975-05-13 Westinghouse Electric Corp Method of making a planar graded channel MOS transistor

Also Published As

Publication number Publication date
JPS5169372A (fr) 1976-06-15
DE2546314A1 (de) 1976-05-13
FR2290760A1 (fr) 1976-06-04
GB1501249A (en) 1978-02-15
US3943542A (en) 1976-03-09

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Legal Events

Date Code Title Description
ST Notification of lapse