FR2167939B1 - - Google Patents

Info

Publication number
FR2167939B1
FR2167939B1 FR7300848A FR7300848A FR2167939B1 FR 2167939 B1 FR2167939 B1 FR 2167939B1 FR 7300848 A FR7300848 A FR 7300848A FR 7300848 A FR7300848 A FR 7300848A FR 2167939 B1 FR2167939 B1 FR 2167939B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7300848A
Other languages
French (fr)
Other versions
FR2167939A1 (enrdf_load_stackoverflow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of FR2167939A1 publication Critical patent/FR2167939A1/fr
Application granted granted Critical
Publication of FR2167939B1 publication Critical patent/FR2167939B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H05K3/4667—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders characterized by using an inorganic intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092—Dispersed materials, e.g. conductive pastes or inks

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
FR7300848A 1972-01-14 1973-01-11 Expired FR2167939B1 (enrdf_load_stackoverflow)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP584972A JPS4876059A (enrdf_load_stackoverflow) 1972-01-14 1972-01-14

Publications (2)

Publication Number Publication Date
FR2167939A1 FR2167939A1 (enrdf_load_stackoverflow) 1973-08-24
FR2167939B1 true FR2167939B1 (enrdf_load_stackoverflow) 1975-03-28

Family

ID=11622437

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7300848A Expired FR2167939B1 (enrdf_load_stackoverflow) 1972-01-14 1973-01-11

Country Status (4)

Country Link
JP (1) JPS4876059A (enrdf_load_stackoverflow)
DE (1) DE2301277A1 (enrdf_load_stackoverflow)
FR (1) FR2167939B1 (enrdf_load_stackoverflow)
NL (1) NL7300548A (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2611871A1 (de) * 1975-03-26 1976-10-07 Honeywell Inf Systems Elektrische schaltungsbaugruppe in mehrschichtbauweise und verfahren zu deren herstellung
JPS5610998A (en) * 1979-07-09 1981-02-03 Hitachi Ltd Method of manufacturing ceramic multilayer wiring substrate
US4302625A (en) * 1980-06-30 1981-11-24 International Business Machines Corp. Multi-layer ceramic substrate
FR2490059A1 (fr) * 1980-09-09 1982-03-12 Serras Paulet Edouard Circuit imprime et son procede de fabrication
US4645552A (en) * 1984-11-19 1987-02-24 Hughes Aircraft Company Process for fabricating dimensionally stable interconnect boards
JPS6276600A (ja) * 1985-09-29 1987-04-08 株式会社　アサヒ化学研究所 基板に導電回路を形成する方法
GB8909729D0 (en) * 1989-04-27 1990-04-25 Ici Plc Compositions
JP4731976B2 (ja) * 2004-12-15 2011-07-27 株式会社トクヤマ メタライズドセラミック基板の製造方法

Also Published As

Publication number Publication date
FR2167939A1 (enrdf_load_stackoverflow) 1973-08-24
NL7300548A (enrdf_load_stackoverflow) 1973-07-17
DE2301277A1 (de) 1973-08-02
JPS4876059A (enrdf_load_stackoverflow) 1973-10-13

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Legal Events

Date Code Title Description
ST Notification of lapse