FR2132347B1 - - Google Patents
Info
- Publication number
- FR2132347B1 FR2132347B1 FR7211541A FR7211541A FR2132347B1 FR 2132347 B1 FR2132347 B1 FR 2132347B1 FR 7211541 A FR7211541 A FR 7211541A FR 7211541 A FR7211541 A FR 7211541A FR 2132347 B1 FR2132347 B1 FR 2132347B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/112—Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/676—Combinations of only thyristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
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- H10P14/61—
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- H10P14/6309—
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- H10P14/6322—
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- H10W10/0121—
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- H10W10/0126—
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- H10W10/13—
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- H10W74/43—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/049—Equivalence and options
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NLAANVRAGE7104496,A NL170901C (nl) | 1971-04-03 | 1971-04-03 | Werkwijze voor het vervaardigen van een halfgeleiderinrichting. |
| US23878472A | 1972-03-28 | 1972-03-28 | |
| US437005A US3873383A (en) | 1971-04-03 | 1974-01-28 | Integrated circuits with oxidation-junction isolation and channel stop |
| US05/458,526 US3961356A (en) | 1971-04-03 | 1974-04-08 | Integrated circuit with oxidation-junction isolation and channel stop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2132347A1 FR2132347A1 (enExample) | 1972-11-17 |
| FR2132347B1 true FR2132347B1 (enExample) | 1977-08-26 |
Family
ID=27483791
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7211541A Expired FR2132347B1 (enExample) | 1971-04-03 | 1972-03-31 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US3873383A (enExample) |
| AT (1) | AT324430B (enExample) |
| CA (1) | CA963173A (enExample) |
| CH (1) | CH542513A (enExample) |
| FR (1) | FR2132347B1 (enExample) |
| GB (1) | GB1388486A (enExample) |
| NL (1) | NL170901C (enExample) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4005453A (en) * | 1971-04-14 | 1977-01-25 | U.S. Philips Corporation | Semiconductor device with isolated circuit elements and method of making |
| US3992232A (en) * | 1973-08-06 | 1976-11-16 | Hitachi, Ltd. | Method of manufacturing semiconductor device having oxide isolation structure and guard ring |
| GB1457139A (en) * | 1973-09-27 | 1976-12-01 | Hitachi Ltd | Method of manufacturing semiconductor device |
| US3979765A (en) * | 1974-03-07 | 1976-09-07 | Signetics Corporation | Silicon gate MOS device and method |
| US4023195A (en) * | 1974-10-23 | 1977-05-10 | Smc Microsystems Corporation | MOS field-effect transistor structure with mesa-like contact and gate areas and selectively deeper junctions |
| US3962717A (en) * | 1974-10-29 | 1976-06-08 | Fairchild Camera And Instrument Corporation | Oxide isolated integrated injection logic with selective guard ring |
| US3993513A (en) * | 1974-10-29 | 1976-11-23 | Fairchild Camera And Instrument Corporation | Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures |
| US3967002A (en) * | 1974-12-31 | 1976-06-29 | International Business Machines Corporation | Method for making high density magnetic bubble domain system |
| DE2510593C3 (de) * | 1975-03-11 | 1982-03-18 | Siemens AG, 1000 Berlin und 8000 München | Integrierte Halbleiter-Schaltungsanordnung |
| US4013484A (en) * | 1976-02-25 | 1977-03-22 | Intel Corporation | High density CMOS process |
| US4047217A (en) * | 1976-04-12 | 1977-09-06 | Fairchild Camera And Instrument Corporation | High-gain, high-voltage transistor for linear integrated circuits |
| US4137109A (en) * | 1976-04-12 | 1979-01-30 | Texas Instruments Incorporated | Selective diffusion and etching method for isolation of integrated logic circuit |
| US4198649A (en) * | 1976-09-03 | 1980-04-15 | Fairchild Camera And Instrument Corporation | Memory cell structure utilizing conductive buried regions |
| US4197143A (en) * | 1976-09-03 | 1980-04-08 | Fairchild Camera & Instrument Corporation | Method of making a junction field-effect transistor utilizing a conductive buried region |
| US4149177A (en) * | 1976-09-03 | 1979-04-10 | Fairchild Camera And Instrument Corporation | Method of fabricating conductive buried regions in integrated circuits and the resulting structures |
| US4064527A (en) * | 1976-09-20 | 1977-12-20 | Intersil, Inc. | Integrated circuit having a buried load device |
| JPS5356972A (en) * | 1976-11-01 | 1978-05-23 | Mitsubishi Electric Corp | Mesa type semiconductor device |
| US4149906A (en) * | 1977-04-29 | 1979-04-17 | International Business Machines Corporation | Process for fabrication of merged transistor logic (MTL) cells |
| US4316319A (en) * | 1977-10-25 | 1982-02-23 | International Business Machines Corporation | Method for making a high sheet resistance structure for high density integrated circuits |
| US4140558A (en) * | 1978-03-02 | 1979-02-20 | Bell Telephone Laboratories, Incorporated | Isolation of integrated circuits utilizing selective etching and diffusion |
| JPS5951743B2 (ja) * | 1978-11-08 | 1984-12-15 | 株式会社日立製作所 | 半導体集積装置 |
| JPS5852339B2 (ja) * | 1979-03-20 | 1983-11-22 | 富士通株式会社 | 半導体装置の製造方法 |
| JPS55153342A (en) * | 1979-05-18 | 1980-11-29 | Fujitsu Ltd | Semiconductor device and its manufacture |
| US4289550A (en) * | 1979-05-25 | 1981-09-15 | Raytheon Company | Method of forming closely spaced device regions utilizing selective etching and diffusion |
| US4261763A (en) * | 1979-10-01 | 1981-04-14 | Burroughs Corporation | Fabrication of integrated circuits employing only ion implantation for all dopant layers |
| JPS5673446A (en) * | 1979-11-21 | 1981-06-18 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
| US4373965A (en) * | 1980-12-22 | 1983-02-15 | Ncr Corporation | Suppression of parasitic sidewall transistors in locos structures |
| US4824797A (en) * | 1985-10-31 | 1989-04-25 | International Business Machines Corporation | Self-aligned channel stop |
| DE4119904A1 (de) * | 1991-06-17 | 1992-12-24 | Telefunken Electronic Gmbh | Halbleiteranordnung |
| US6087677A (en) * | 1997-11-10 | 2000-07-11 | Integrated Silicon Solutions Inc. | High density self-aligned antifuse |
| DE19840032C1 (de) * | 1998-09-02 | 1999-11-18 | Siemens Ag | Halbleiterbauelement und Herstellungsverfahren dazu |
| US6819089B2 (en) * | 2001-11-09 | 2004-11-16 | Infineon Technologies Ag | Power factor correction circuit with high-voltage semiconductor component |
| US6828609B2 (en) * | 2001-11-09 | 2004-12-07 | Infineon Technologies Ag | High-voltage semiconductor component |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1095413A (enExample) * | 1964-12-24 | |||
| US3386865A (en) * | 1965-05-10 | 1968-06-04 | Ibm | Process of making planar semiconductor devices isolated by encapsulating oxide filled channels |
| NL159817B (nl) * | 1966-10-05 | 1979-03-15 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| NL152707B (nl) * | 1967-06-08 | 1977-03-15 | Philips Nv | Halfgeleiderinrichting bevattende een veldeffecttransistor van het type met geisoleerde poortelektrode en werkwijze ter vervaardiging daarvan. |
| NL6916988A (enExample) * | 1969-11-11 | 1971-05-13 | ||
| NL169936C (nl) * | 1970-07-10 | 1982-09-01 | Philips Nv | Halfgeleiderinrichting omvattende een halfgeleiderlichaam met een althans ten dele in het halfgeleiderlichaam verzonken oxydepatroon. |
| US3648125A (en) * | 1971-02-02 | 1972-03-07 | Fairchild Camera Instr Co | Method of fabricating integrated circuits with oxidized isolation and the resulting structure |
| US3751722A (en) * | 1971-04-30 | 1973-08-07 | Standard Microsyst Smc | Mos integrated circuit with substrate containing selectively formed resistivity regions |
| US3796613A (en) * | 1971-06-18 | 1974-03-12 | Ibm | Method of forming dielectric isolation for high density pedestal semiconductor devices |
-
1971
- 1971-04-03 NL NLAANVRAGE7104496,A patent/NL170901C/xx not_active IP Right Cessation
-
1972
- 1972-03-29 CH CH467272A patent/CH542513A/de not_active IP Right Cessation
- 1972-03-30 GB GB1502272A patent/GB1388486A/en not_active Expired
- 1972-03-31 FR FR7211541A patent/FR2132347B1/fr not_active Expired
- 1972-03-31 AT AT283372A patent/AT324430B/de not_active IP Right Cessation
- 1972-04-04 CA CA138,769A patent/CA963173A/en not_active Expired
-
1974
- 1974-01-28 US US437005A patent/US3873383A/en not_active Expired - Lifetime
- 1974-04-08 US US05/458,526 patent/US3961356A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US3873383A (en) | 1975-03-25 |
| NL7104496A (enExample) | 1972-10-05 |
| CH542513A (de) | 1973-11-15 |
| AT324430B (de) | 1975-08-25 |
| US3961356A (en) | 1976-06-01 |
| GB1388486A (en) | 1975-03-26 |
| NL170901B (nl) | 1982-08-02 |
| DE2215351B2 (de) | 1977-05-05 |
| FR2132347A1 (enExample) | 1972-11-17 |
| NL170901C (nl) | 1983-01-03 |
| DE2215351A1 (de) | 1972-10-12 |
| CA963173A (en) | 1975-02-18 |