FR2105176B1 - - Google Patents

Info

Publication number
FR2105176B1
FR2105176B1 FR7127187A FR7127187A FR2105176B1 FR 2105176 B1 FR2105176 B1 FR 2105176B1 FR 7127187 A FR7127187 A FR 7127187A FR 7127187 A FR7127187 A FR 7127187A FR 2105176 B1 FR2105176 B1 FR 2105176B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7127187A
Other languages
French (fr)
Other versions
FR2105176A1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2105176A1 publication Critical patent/FR2105176A1/fr
Application granted granted Critical
Publication of FR2105176B1 publication Critical patent/FR2105176B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR7127187A 1970-09-02 1971-07-20 Expired FR2105176B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702043405 DE2043405A1 (en) 1970-09-02 1970-09-02 Semiconductor arrangement with monolithically integrated insulating layer field effect transistors

Publications (2)

Publication Number Publication Date
FR2105176A1 FR2105176A1 (en) 1972-04-28
FR2105176B1 true FR2105176B1 (en) 1974-10-31

Family

ID=5781308

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7127187A Expired FR2105176B1 (en) 1970-09-02 1971-07-20

Country Status (8)

Country Link
AU (1) AU3180371A (en)
BE (1) BE770898A (en)
CH (1) CH534431A (en)
DE (1) DE2043405A1 (en)
ES (1) ES394706A1 (en)
FR (1) FR2105176B1 (en)
GB (1) GB1353366A (en)
NL (1) NL7112058A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2572851B1 (en) * 1984-11-08 1987-07-31 Matra Harris Semiconducteurs PREDIFFUSED NETWORK WITH INTERCONNECTABLE BASE CELLS

Also Published As

Publication number Publication date
DE2043405A1 (en) 1972-03-16
FR2105176A1 (en) 1972-04-28
BE770898A (en) 1971-12-16
AU3180371A (en) 1973-02-01
NL7112058A (en) 1972-03-06
ES394706A1 (en) 1975-11-01
CH534431A (en) 1973-02-28
GB1353366A (en) 1974-05-15

Similar Documents

Publication Publication Date Title
AR204384A1 (en)
FR2116424A1 (en)
ATA96471A (en)
AU2044470A (en)
AU1473870A (en)
AU1146470A (en)
FR2105176B1 (en)
AU1336970A (en)
AU1326870A (en)
AU2085370A (en)
AU1517670A (en)
AU2130570A (en)
AU2017870A (en)
AR195465A1 (en)
AU1189670A (en)
AU2119370A (en)
AU1328670A (en)
AU2061170A (en)
ATA672271A (en)
AU2112570A (en)
AU1004470A (en)
AU1277070A (en)
AU1247570A (en)
AU1064870A (en)
AU1083170A (en)

Legal Events

Date Code Title Description
ST Notification of lapse