ES394706A1 - Integrated semiconductor read-only storage cell matrices - Google Patents

Integrated semiconductor read-only storage cell matrices

Info

Publication number
ES394706A1
ES394706A1 ES394706A ES394706A ES394706A1 ES 394706 A1 ES394706 A1 ES 394706A1 ES 394706 A ES394706 A ES 394706A ES 394706 A ES394706 A ES 394706A ES 394706 A1 ES394706 A1 ES 394706A1
Authority
ES
Spain
Prior art keywords
semiconductor substrate
insulation layer
zones
covers
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES394706A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES394706A1 publication Critical patent/ES394706A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

Enhancements introduced into semiconductor arrangements with multiple insulation layer field effect transistors integrated into a common semiconductor substrate, the input (flux) and output electrode zones of which are arranged as doped zones with opposite sign to the semiconductor substrate at a distance of separation, in the semiconductor substrate, which determines the length of the channel zone, and with an insulation layer that covers the semiconductor substrate, on which metallization zones extend as circuit connections, as well as electrode metallizations control, characterized by a uniform insulation layer that covers the semiconductor substrate with the various insulation layer field effect transistors made in it, and by means to avoid unwanted channel formations between impurified zones with opposite sign with respect to the semiconductor substrate, which are covered by an area of metal tion on the insulation layer. (Machine-translation by Google Translate, not legally binding)
ES394706A 1970-09-02 1971-09-01 Integrated semiconductor read-only storage cell matrices Expired ES394706A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702043405 DE2043405A1 (en) 1970-09-02 1970-09-02 Semiconductor arrangement with monolithically integrated insulating layer field effect transistors

Publications (1)

Publication Number Publication Date
ES394706A1 true ES394706A1 (en) 1975-11-01

Family

ID=5781308

Family Applications (1)

Application Number Title Priority Date Filing Date
ES394706A Expired ES394706A1 (en) 1970-09-02 1971-09-01 Integrated semiconductor read-only storage cell matrices

Country Status (8)

Country Link
AU (1) AU3180371A (en)
BE (1) BE770898A (en)
CH (1) CH534431A (en)
DE (1) DE2043405A1 (en)
ES (1) ES394706A1 (en)
FR (1) FR2105176B1 (en)
GB (1) GB1353366A (en)
NL (1) NL7112058A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2572851B1 (en) * 1984-11-08 1987-07-31 Matra Harris Semiconducteurs PREDIFFUSED NETWORK WITH INTERCONNECTABLE BASE CELLS

Also Published As

Publication number Publication date
GB1353366A (en) 1974-05-15
NL7112058A (en) 1972-03-06
BE770898A (en) 1971-12-16
AU3180371A (en) 1973-02-01
FR2105176B1 (en) 1974-10-31
DE2043405A1 (en) 1972-03-16
FR2105176A1 (en) 1972-04-28
CH534431A (en) 1973-02-28

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