FR2022785A1 - - Google Patents

Info

Publication number
FR2022785A1
FR2022785A1 FR6938207A FR6938207A FR2022785A1 FR 2022785 A1 FR2022785 A1 FR 2022785A1 FR 6938207 A FR6938207 A FR 6938207A FR 6938207 A FR6938207 A FR 6938207A FR 2022785 A1 FR2022785 A1 FR 2022785A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR6938207A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of FR2022785A1 publication Critical patent/FR2022785A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/5235—Multiplying only using indirect methods, e.g. quarter square method, via logarithmic domain
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/552—Powers or roots, e.g. Pythagorean sums
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/552—Indexing scheme relating to groups G06F7/552 - G06F7/5525
    • G06F2207/5523—Calculates a power, e.g. the square, of a number or a function, e.g. polynomials

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
FR6938207A 1968-11-07 1969-11-06 Withdrawn FR2022785A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US77413868A 1968-11-07 1968-11-07

Publications (1)

Publication Number Publication Date
FR2022785A1 true FR2022785A1 (fr) 1970-08-07

Family

ID=25100348

Family Applications (1)

Application Number Title Priority Date Filing Date
FR6938207A Withdrawn FR2022785A1 (fr) 1968-11-07 1969-11-06

Country Status (6)

Country Link
US (1) US3610906A (fr)
BE (1) BE741276A (fr)
BR (1) BR6913949D0 (fr)
DE (1) DE1956209C3 (fr)
FR (1) FR2022785A1 (fr)
GB (1) GB1280906A (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3749898A (en) * 1971-10-26 1973-07-31 Litton Systems Inc Apparatus for multiplying binary signals based on the binomial theorem
JPS5416603Y2 (fr) * 1977-05-25 1979-06-29
US4313174A (en) * 1980-03-17 1982-01-26 Rockwell International Corporation ROM-Based parallel digital arithmetic device
US4514825A (en) * 1982-03-09 1985-04-30 Kinex Corporation High speed digital modem
JP2816624B2 (ja) * 1991-04-01 1998-10-27 モトローラ・インコーポレイテッド ２乗演算を実行する速度改良型データ処理システム及びその方法
KR100195178B1 (ko) * 1992-12-31 1999-06-15 윤종용 제곱 계산 회로
FR2712410B1 (fr) * 1993-11-08 1996-02-09 Sgs Thomson Microelectronics Circuit élévateur au carré de nombres binaires.
US5956265A (en) * 1996-06-07 1999-09-21 Lewis; James M. Boolean digital multiplier
US6018758A (en) * 1997-07-30 2000-01-25 Lucent Technologies Inc. Squarer with diagonal row merged into folded partial product array
US6460065B1 (en) * 1998-09-22 2002-10-01 Ati International Srl Circuit and method for partial product bit shifting
US6393453B1 (en) * 1998-09-22 2002-05-21 Ati International Srl Circuit and method for fast squaring
US6301598B1 (en) * 1998-12-09 2001-10-09 Lsi Logic Corporation Method and apparatus for estimating a square of a number
US6584483B1 (en) * 1999-12-30 2003-06-24 Intel Corporation System and method for efficient hardware implementation of a perfect precision blending function
US7080114B2 (en) * 2001-12-04 2006-07-18 Florida Atlantic University High speed scaleable multiplier
US20040128336A1 (en) * 2002-08-22 2004-07-01 Zierhofer Clemens M. Method and system for multiplication of binary numbers
US9292283B2 (en) * 2012-07-11 2016-03-22 Intel Corporation Method for fast large-integer arithmetic on IA processors
US11016732B1 (en) 2018-04-17 2021-05-25 Ali Tasdighi Far Approximate nonlinear digital data conversion for small size multiply-accumulate in artificial intelligence
US10884705B1 (en) 2018-04-17 2021-01-05 Ali Tasdighi Far Approximate mixed-mode square-accumulate for small area machine learning
US11144316B1 (en) 2018-04-17 2021-10-12 Ali Tasdighi Far Current-mode mixed-signal SRAM based compute-in-memory for low power machine learning
US11416218B1 (en) 2020-07-10 2022-08-16 Ali Tasdighi Far Digital approximate squarer for machine learning
US11615256B1 (en) 2019-12-30 2023-03-28 Ali Tasdighi Far Hybrid accumulation method in multiply-accumulate for machine learning
US11467805B1 (en) 2020-07-10 2022-10-11 Ali Tasdighi Far Digital approximate multipliers for machine learning and artificial intelligence applications
US11610104B1 (en) 2019-12-30 2023-03-21 Ali Tasdighi Far Asynchronous analog accelerator for fully connected artificial neural networks
RU2744239C1 (ru) * 2020-07-05 2021-03-04 Федеральное государственное бюджетное образовательное учреждение высшего образования. "Юго-Западный государственный университет" (ЮЗГУ) Устройство для возведения бинарной матрицы в квадрат

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3065423A (en) * 1959-10-30 1962-11-20 Herbert L Peterson Simultaneous hybrid digital-analog multiplier
US3191017A (en) * 1962-09-11 1965-06-22 Hitachi Ltd Analog multiplier
US3393308A (en) * 1963-07-12 1968-07-16 Bendix Corp Electronic function generator
US3290493A (en) * 1965-04-01 1966-12-06 North American Aviation Inc Truncated parallel multiplication
US3444360A (en) * 1965-07-12 1969-05-13 United Geophysical Corp Digital multiplier followed by a digital-to-analog converter
US3500026A (en) * 1965-09-10 1970-03-10 Vyzk Ustav Matemat Stroju Multiplication apparatus utilizing either a positive or a negative multiplier wherein form conversion at each interface of the multiplying unit is unnecessary

Also Published As

Publication number Publication date
BR6913949D0 (pt) 1973-01-04
BE741276A (fr) 1970-04-16
DE1956209A1 (de) 1970-06-18
US3610906A (en) 1971-10-05
DE1956209C3 (de) 1980-02-28
GB1280906A (en) 1972-07-12
DE1956209B2 (de) 1979-06-28

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Legal Events

Date Code Title Description
ST Notification of lapse