FR1536616A - Système de traitement d'instructions avec des perfectionnements pour le branchementet les boucles du programme - Google Patents

Système de traitement d'instructions avec des perfectionnements pour le branchementet les boucles du programme

Info

Publication number
FR1536616A
FR1536616A FR1536616DA FR1536616A FR 1536616 A FR1536616 A FR 1536616A FR 1536616D A FR1536616D A FR 1536616DA FR 1536616 A FR1536616 A FR 1536616A
Authority
FR
France
Prior art keywords
branching
processing system
instruction processing
program loops
loops
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of FR1536616A publication Critical patent/FR1536616A/fr
Active legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/104—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error using arithmetic codes, i.e. codes which are preserved during operation, e.g. modulo 9 or 11 check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
    • G06F9/381—Loop buffering
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
FR1536616D 1966-09-21 Système de traitement d'instructions avec des perfectionnements pour le branchementet les boucles du programme Active FR1536616A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58105266A 1966-09-21 1966-09-21
US580910A US3418638A (en) 1966-09-21 1966-09-21 Instruction processing unit for program branches

Publications (1)

Publication Number Publication Date
FR1536616A true FR1536616A (fr)

Family

ID=27078163

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1536616D Active FR1536616A (fr) 1966-09-21 Système de traitement d'instructions avec des perfectionnements pour le branchementet les boucles du programme

Country Status (4)

Country Link
US (2) US3490005A (fr)
DE (1) DE1299146B (fr)
FR (1) FR1536616A (fr)
GB (1) GB1130270A (fr)

Cited By (1)

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FR2413716A1 (fr) * 1978-01-03 1979-07-27 Ibm Dispositif de mise en sequence d'instructions

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US3626427A (en) * 1967-01-13 1971-12-07 Ibm Large-scale data processing system
US3526878A (en) * 1967-03-27 1970-09-01 Burroughs Corp Digital computer system
US3512133A (en) * 1967-03-27 1970-05-12 Burroughs Corp Digital data transmission system having means for automatically switching the status of input-output control units
SE303056B (fr) * 1967-08-31 1968-08-12 Ericsson Telefon Ab L M
US3577190A (en) * 1968-06-26 1971-05-04 Ibm Apparatus in a digital computer for allowing the skipping of predetermined instructions in a sequence of instructions, in response to the occurrence of certain conditions
US3568163A (en) * 1968-10-07 1971-03-02 Hewlett Packard Co Incremental display circuit
JPS5021821B1 (fr) * 1968-10-31 1975-07-25
US3577189A (en) * 1969-01-15 1971-05-04 Ibm Apparatus and method in a digital computer for allowing improved program branching with branch anticipation reduction of the number of branches, and reduction of branch delays
US3959777A (en) * 1972-07-17 1976-05-25 International Business Machines Corporation Data processor for pattern recognition and the like
JPS545942B2 (fr) * 1972-10-07 1979-03-23
JPS5413949B2 (fr) * 1973-05-14 1979-06-04
US3974479A (en) * 1973-05-01 1976-08-10 Digital Equipment Corporation Memory for use in a computer system in which memories have diverse retrieval characteristics
US3810110A (en) * 1973-05-01 1974-05-07 Digital Equipment Corp Computer system overlap of memory operation
US3881173A (en) * 1973-05-14 1975-04-29 Amdahl Corp Condition code determination and data processing
JPS50114944A (fr) * 1974-02-18 1975-09-09
USRE31790E (en) * 1974-03-13 1985-01-01 Sperry Corporation Shared processor data entry system
DE2617485C3 (de) * 1976-04-22 1980-09-18 Nixdorf Computer Ag, 4790 Paderborn Schaltungsanordnung für Datenverarbeitungsanlagen zur Abarbeitung von Mikrobefehlsfolgen
SE403322B (sv) * 1977-02-28 1978-08-07 Ellemtel Utvecklings Ab Anordning i en styrdator for forkortning av exekveringstiden for instruktioner vid indirekt adressering av ett dataminne
US4179737A (en) * 1977-12-23 1979-12-18 Burroughs Corporation Means and methods for providing greater speed and flexibility of microinstruction sequencing
US4287561A (en) * 1978-03-16 1981-09-01 International Business Machines Corporation Address formulation interlock mechanism
US4181942A (en) * 1978-03-31 1980-01-01 International Business Machines Corporation Program branching method and apparatus
JPS5927935B2 (ja) * 1980-02-29 1984-07-09 株式会社日立製作所 情報処理装置
US4325118A (en) 1980-03-03 1982-04-13 Western Digital Corporation Instruction fetch circuitry for computers
JPS56149646A (en) * 1980-04-21 1981-11-19 Toshiba Corp Operation controller
US4373180A (en) * 1980-07-09 1983-02-08 Sperry Corporation Microprogrammed control system capable of pipelining even when executing a conditional branch instruction
US4471432A (en) * 1982-10-13 1984-09-11 Wilhite John E Method and apparatus for initiating the execution of instructions using a central pipeline execution unit
DE3626500A1 (de) * 1986-08-05 1988-02-18 Siemens Ag Verfahren und anordnung zur steuerung des vorauslesens von neuen befehlen einer befehlsfolge in den befehlspuffer einer datenverarbeitungsanlage
US4933837A (en) * 1986-12-01 1990-06-12 Advanced Micro Devices, Inc. Methods and apparatus for optimizing instruction processing in computer systems employing a combination of instruction cache and high speed consecutive transfer memories
DE3856299T2 (de) * 1987-11-12 1999-07-01 Matsushita Electric Ind Co Ltd Verarbeitungssystem für Verzweigungsbefehle
US5197136A (en) * 1987-11-12 1993-03-23 Matsushita Electric Industrial Co., Ltd. Processing system for branch instruction
US4914579A (en) * 1988-02-17 1990-04-03 International Business Machines Corporation Apparatus for branch prediction for computer instructions
JPH02306341A (ja) * 1989-02-03 1990-12-19 Nec Corp マイクロプロセッサ
JP3804941B2 (ja) * 2002-06-28 2006-08-02 富士通株式会社 命令フェッチ制御装置
US7539853B2 (en) 2002-11-18 2009-05-26 Arm Limited Handling interrupts in data processing of data in which only a portion of a function has been processed
US9158574B2 (en) 2002-11-18 2015-10-13 Arm Limited Handling interrupts in data processing
DE10254653B4 (de) * 2002-11-22 2009-05-28 Infineon Technologies Ag Vorrichtung zur Steuerung der Verarbeitung von Datenwörtern eines Datenstroms
US8650470B2 (en) * 2003-03-20 2014-02-11 Arm Limited Error recovery within integrated circuit
US7636810B2 (en) * 2003-11-26 2009-12-22 Intel Corporation Method, system, and apparatus for memory compression with flexible in-memory cache
JP2006243865A (ja) * 2005-03-01 2006-09-14 Seiko Epson Corp プロセッサおよび情報処理方法
US8190830B2 (en) * 2005-12-23 2012-05-29 Intel Corporation Method, apparatus, and systems to support execution pipelining in a memory controller
CN107533461B (zh) * 2015-04-24 2022-03-18 优创半导体科技有限公司 具有用于对存储器寻址的不同寄存器的计算机处理器

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US2202969A (en) * 1938-08-13 1940-06-04 Sklarek Clifford Convertible light
USRE26087E (en) * 1959-12-30 1966-09-20 Multi-computer system including multiplexed memories. lookahead, and address interleaving features
US3201760A (en) * 1960-02-17 1965-08-17 Honeywell Inc Information handling apparatus
NL262931A (fr) * 1960-03-29
US3156897A (en) * 1960-12-01 1964-11-10 Ibm Data processing system with look ahead feature
NL298451A (fr) * 1962-10-01
US3307150A (en) * 1962-11-16 1967-02-28 Stromberg Carlson Corp Queue store
US3290648A (en) * 1963-01-02 1966-12-06 Bunker Ramo Comparator
US3292155A (en) * 1963-03-15 1966-12-13 Burroughs Corp Computer branch command
US3325788A (en) * 1964-12-21 1967-06-13 Ibm Extrinsically variable microprogram controls
DE1269392B (de) * 1965-04-05 1968-05-30 Ibm Einrichtung zur Division von Dezimalziffern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2413716A1 (fr) * 1978-01-03 1979-07-27 Ibm Dispositif de mise en sequence d'instructions

Also Published As

Publication number Publication date
DE1299146B (de) 1969-07-10
GB1130270A (en) 1968-10-16
US3418638A (en) 1968-12-24
US3490005A (en) 1970-01-13

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