FR1339892A - Procédé pour donner leur forme définitive aux systèmes à semi-conducteurs - Google Patents

Procédé pour donner leur forme définitive aux systèmes à semi-conducteurs

Info

Publication number
FR1339892A
FR1339892A FR916155A FR916155A FR1339892A FR 1339892 A FR1339892 A FR 1339892A FR 916155 A FR916155 A FR 916155A FR 916155 A FR916155 A FR 916155A FR 1339892 A FR1339892 A FR 1339892A
Authority
FR
France
Prior art keywords
final shape
semiconductor systems
giving semiconductor
giving
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR916155A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens and Halske AG
Siemens AG
Original Assignee
Siemens and Halske AG
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens and Halske AG, Siemens AG filed Critical Siemens and Halske AG
Application granted granted Critical
Publication of FR1339892A publication Critical patent/FR1339892A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25FPROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00Electrolytic etching or polishing
    • C25F3/02Etching
    • C25F3/12Etching of semiconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Electrolytic Production Of Metals (AREA)
  • Weting (AREA)
FR916155A 1961-11-22 1962-11-21 Procédé pour donner leur forme définitive aux systèmes à semi-conducteurs Expired FR1339892A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES76788A DE1212216B (de) 1961-11-22 1961-11-22 Verfahren zum elektrolytischen AEtzen der pn-UEbergaenge von Halbleiterbauelementen

Publications (1)

Publication Number Publication Date
FR1339892A true FR1339892A (fr) 1963-10-11

Family

ID=7506366

Family Applications (1)

Application Number Title Priority Date Filing Date
FR916155A Expired FR1339892A (fr) 1961-11-22 1962-11-21 Procédé pour donner leur forme définitive aux systèmes à semi-conducteurs

Country Status (6)

Country Link
CH (1) CH406440A (fr)
DE (1) DE1212216B (fr)
FR (1) FR1339892A (fr)
GB (1) GB1017652A (fr)
NL (2) NL137553C (fr)
SE (1) SE307195B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374405A (en) * 1965-06-22 1968-03-19 Philco Ford Corp Semiconductive device and method of fabricating the same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1275836A (fr) * 1959-12-11 1961-11-10 Thomson Houston Comp Francaise Dispositifs à semi-conducteur et méthode de fabrication

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3374405A (en) * 1965-06-22 1968-03-19 Philco Ford Corp Semiconductive device and method of fabricating the same

Also Published As

Publication number Publication date
SE307195B (fr) 1968-12-23
NL284485A (fr)
NL137553C (fr)
GB1017652A (en) 1966-01-19
CH406440A (de) 1966-01-31
DE1212216B (de) 1966-03-10

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