FR1099888A - Support isolant muni d'un câblage - Google Patents
Support isolant muni d'un câblageInfo
- Publication number
- FR1099888A FR1099888A FR1099888DA FR1099888A FR 1099888 A FR1099888 A FR 1099888A FR 1099888D A FR1099888D A FR 1099888DA FR 1099888 A FR1099888 A FR 1099888A
- Authority
- FR
- France
- Prior art keywords
- wiring
- insulating support
- insulating
- support
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
- H01L23/49844—Geometry or layout for devices being provided for in H01L29/00
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4918—Disposition being disposed on at least two different sides of the body, e.g. dual array
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL178165 | 1953-05-07 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1099888A true FR1099888A (fr) | 1955-09-12 |
Family
ID=19750607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1099888D Expired FR1099888A (fr) | 1953-05-07 | 1954-05-05 | Support isolant muni d'un câblage |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE1698910U (fr) |
FR (1) | FR1099888A (fr) |
NL (1) | NL178165B (fr) |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1156457B (de) * | 1961-07-08 | 1963-10-31 | Telefunken Patent | Verfahren zur Herstellung einer integrierten Schaltungsanordnung |
US3231797A (en) * | 1963-09-20 | 1966-01-25 | Nat Semiconductor Corp | Semiconductor device |
DE1236612B (de) * | 1960-02-24 | 1967-03-16 | Globe Union Inc | Befestigung eines Transistors innerhalb eines gedruckten Stromkreises in der Ausnehmung einer Isolierplatte |
DE1283965B (de) * | 1959-05-06 | 1968-11-28 | Texas Instruments Inc | Hermetisch eingeschlossene Halbleiteranordnung |
US3471753A (en) * | 1965-05-26 | 1969-10-07 | Sprague Electric Co | Semiconductor mounting chip assembly |
US3480836A (en) * | 1966-08-11 | 1969-11-25 | Ibm | Component mounted in a printed circuit |
US3484534A (en) * | 1966-07-29 | 1969-12-16 | Texas Instruments Inc | Multilead package for a multilead electrical device |
DE1616293B1 (de) * | 1967-05-04 | 1971-08-26 | North American Rockwell | Verfahren zum Verbinden eines Mikroschaltungsplaettchens mit einer Unterlage |
US3678346A (en) * | 1964-11-10 | 1972-07-18 | Trw Inc | Semiconductor device and method of making the same |
US3702953A (en) * | 1970-04-28 | 1972-11-14 | Agfa Gevaert Ag | Printed circuit arrangement |
US3828210A (en) * | 1973-01-22 | 1974-08-06 | Motorola Inc | Temperature compensated mounting structure for coupled resonator crystals |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3365620A (en) * | 1966-06-13 | 1968-01-23 | Ibm | Circuit package with improved modular assembly and cooling apparatus |
DE3326968A1 (de) * | 1982-06-12 | 1985-02-14 | IVO Irion & Vosseler, Zählerfabrik GmbH & Co, 7730 Villingen-Schwenningen | Traegerbauteil aus thermoplastischem material mit durch heisspraegen aufgebrachten metallischen leitern |
DE3409146A1 (de) * | 1984-03-13 | 1985-09-19 | Siemens AG, 1000 Berlin und 8000 München | Optoelektronisches mudul |
DE3501710A1 (de) * | 1985-01-19 | 1986-07-24 | Allied Corp., Morristown, N.J. | Leiterplatte mit integralen positioniermitteln |
-
0
- NL NLAANVRAGE7310776,A patent/NL178165B/xx unknown
-
1954
- 1954-05-03 DE DEN4159U patent/DE1698910U/de not_active Expired
- 1954-05-05 FR FR1099888D patent/FR1099888A/fr not_active Expired
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1283965B (de) * | 1959-05-06 | 1968-11-28 | Texas Instruments Inc | Hermetisch eingeschlossene Halbleiteranordnung |
DE1236612B (de) * | 1960-02-24 | 1967-03-16 | Globe Union Inc | Befestigung eines Transistors innerhalb eines gedruckten Stromkreises in der Ausnehmung einer Isolierplatte |
DE1156457B (de) * | 1961-07-08 | 1963-10-31 | Telefunken Patent | Verfahren zur Herstellung einer integrierten Schaltungsanordnung |
US3231797A (en) * | 1963-09-20 | 1966-01-25 | Nat Semiconductor Corp | Semiconductor device |
US3678346A (en) * | 1964-11-10 | 1972-07-18 | Trw Inc | Semiconductor device and method of making the same |
US3471753A (en) * | 1965-05-26 | 1969-10-07 | Sprague Electric Co | Semiconductor mounting chip assembly |
US3484534A (en) * | 1966-07-29 | 1969-12-16 | Texas Instruments Inc | Multilead package for a multilead electrical device |
US3480836A (en) * | 1966-08-11 | 1969-11-25 | Ibm | Component mounted in a printed circuit |
DE1616293B1 (de) * | 1967-05-04 | 1971-08-26 | North American Rockwell | Verfahren zum Verbinden eines Mikroschaltungsplaettchens mit einer Unterlage |
US3702953A (en) * | 1970-04-28 | 1972-11-14 | Agfa Gevaert Ag | Printed circuit arrangement |
US3828210A (en) * | 1973-01-22 | 1974-08-06 | Motorola Inc | Temperature compensated mounting structure for coupled resonator crystals |
Also Published As
Publication number | Publication date |
---|---|
DE1698910U (de) | 1955-05-18 |
NL178165B (nl) | 1900-01-01 |
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