FI906355A0 - Foerfarande foer justering av en klockgenerators fas i foerhaollande till en datasignal. - Google Patents

Foerfarande foer justering av en klockgenerators fas i foerhaollande till en datasignal.

Info

Publication number
FI906355A0
FI906355A0 FI906355A FI906355A FI906355A0 FI 906355 A0 FI906355 A0 FI 906355A0 FI 906355 A FI906355 A FI 906355A FI 906355 A FI906355 A FI 906355A FI 906355 A0 FI906355 A0 FI 906355A0
Authority
FI
Finland
Prior art keywords
signal
phase
pct
data
klockgenerators
Prior art date
Application number
FI906355A
Other languages
English (en)
Other versions
FI109853B (fi
Inventor
Rasmus Nordby
Original Assignee
Nordiske Kabel Traad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nordiske Kabel Traad filed Critical Nordiske Kabel Traad
Publication of FI906355A0 publication Critical patent/FI906355A0/fi
Application granted granted Critical
Publication of FI109853B publication Critical patent/FI109853B/fi

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Control Of El Displays (AREA)
FI906355A 1988-06-24 1990-12-21 Menetelmä kellogeneraattorin vaiheen säätämiseksi datasignaalin suhteen FI109853B (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DK348688 1988-06-24
DK348688A DK163397C (da) 1988-06-24 1988-06-24 Fremgangsmaade ved regulering af en taktgenerators fase i forhold til et datasignal
DK8900157 1989-06-23
PCT/DK1989/000157 WO1989012936A1 (en) 1988-06-24 1989-06-23 A method of adjusting the phase of a clock generator with respect to a data signal

Publications (2)

Publication Number Publication Date
FI906355A0 true FI906355A0 (fi) 1990-12-21
FI109853B FI109853B (fi) 2002-10-15

Family

ID=8123449

Family Applications (1)

Application Number Title Priority Date Filing Date
FI906355A FI109853B (fi) 1988-06-24 1990-12-21 Menetelmä kellogeneraattorin vaiheen säätämiseksi datasignaalin suhteen

Country Status (8)

Country Link
US (1) US5161173A (fi)
EP (1) EP0452317B1 (fi)
AT (1) ATE100259T1 (fi)
AU (1) AU3849089A (fi)
DE (1) DE68912348T2 (fi)
DK (1) DK163397C (fi)
FI (1) FI109853B (fi)
WO (1) WO1989012936A1 (fi)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL96808A (en) 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5148113A (en) * 1990-11-29 1992-09-15 Northern Telecom Ltd. Clock phase alignment
US5230013A (en) * 1992-04-06 1993-07-20 Motorola, Inc. PLL-based precision phase shifting at CMOS levels
USRE38482E1 (en) 1992-05-28 2004-03-30 Rambus Inc. Delay stage circuitry for a ring oscillator
TW379293B (en) * 1994-04-01 2000-01-11 Ibm Apparatus and method for generating a clock in a microprocessor
US5557224A (en) * 1994-04-15 1996-09-17 International Business Machines Corporation Apparatus and method for generating a phase-controlled clock signal
US5712884A (en) * 1995-03-31 1998-01-27 Samsung Electronics Co., Ltd. Data receiving method and circuit of digital communication system
EP0758171A3 (en) * 1995-08-09 1997-11-26 Symbios Logic Inc. Data sampling and recovery
US5684805A (en) * 1995-11-30 1997-11-04 Brown; Anthony Kevin Dale Microwave multiphase detector
US5930311A (en) * 1996-10-10 1999-07-27 Alcatel Usa Sourcing, L.P. Circuitry for retiming a received data signal
US6535023B1 (en) * 2000-05-12 2003-03-18 Cypress Semiconductor Corp. Linearized digital phase-locked loop method
JP4416351B2 (ja) * 2001-04-18 2010-02-17 富士通株式会社 位相比較回路及び光受信装置
US7826581B1 (en) 2004-10-05 2010-11-02 Cypress Semiconductor Corporation Linearized digital phase-locked loop method for maintaining end of packet time linearity
JP2009231896A (ja) * 2008-03-19 2009-10-08 Fujitsu Ltd 受信装置および受信方法
JP4656260B2 (ja) * 2008-06-20 2011-03-23 富士通株式会社 受信装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2213680C3 (de) * 1972-03-21 1974-08-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Nachstellen der Phasenlagen eines Referenzträgers und eines Schritt aktes
US4191976A (en) * 1978-09-26 1980-03-04 Data General Corporation Circuit indicating phase relationship
JPS5551100U (fi) * 1978-10-02 1980-04-03
GB2061040B (en) * 1979-10-10 1983-08-10 Philips Electronic Associated Digital signal transmission system
JPS58182938A (ja) * 1982-04-21 1983-10-26 Toshiba Corp Ｐｌｌ形タイミング抽出回路
US4535459A (en) * 1983-05-26 1985-08-13 Rockwell International Corporation Signal detection apparatus
GB8414517D0 (en) * 1984-06-07 1984-07-11 British Telecomm Signal timing circuits
US4682121A (en) * 1985-02-04 1987-07-21 International Business Machines Corporation Phase discriminator and data standardizer
US4820994A (en) * 1986-10-20 1989-04-11 Siemens Aktiengesellschaft Phase regulating circuit
US4809306A (en) * 1986-11-17 1989-02-28 Amp Incorporated RF modem with improved clock recovery circuit
US4972443A (en) * 1987-11-24 1990-11-20 Siemens Aktiengesellschaft Method and arrangement for generating a correction signal for a digital clock recovery means

Also Published As

Publication number Publication date
WO1989012936A1 (en) 1989-12-28
AU3849089A (en) 1990-01-12
ATE100259T1 (de) 1994-01-15
EP0452317B1 (en) 1994-01-12
EP0452317A1 (en) 1991-10-23
DK163397B (da) 1992-02-24
US5161173A (en) 1992-11-03
DE68912348D1 (de) 1994-02-24
DK348688D0 (da) 1988-06-24
DE68912348T2 (de) 1994-06-30
DK163397C (da) 1992-07-13
DK348688A (da) 1989-12-25
FI109853B (fi) 2002-10-15

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Legal Events

Date Code Title Description
GB Transfer or assigment of application

Owner name: DSC COMMUNICATIONS A/S

FG Patent granted

Owner name: TELLABS DENMARK A/S

MA Patent expired