DE68912348D1 - Verfahren zur phasenregelung eines taktgebers in bezug auf ein datensignal. - Google Patents

Verfahren zur phasenregelung eines taktgebers in bezug auf ein datensignal.

Info

Publication number
DE68912348D1
DE68912348D1 DE89907690T DE68912348T DE68912348D1 DE 68912348 D1 DE68912348 D1 DE 68912348D1 DE 89907690 T DE89907690 T DE 89907690T DE 68912348 T DE68912348 T DE 68912348T DE 68912348 D1 DE68912348 D1 DE 68912348D1
Authority
DE
Germany
Prior art keywords
signal
phase
clock
pct
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE89907690T
Other languages
English (en)
Other versions
DE68912348T2 (de
Inventor
Rasmus Nordby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infinera Denmark AS
Original Assignee
NKT BROENDBY DK AS
Nordiske Kabel OG Traadfabriker AS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NKT BROENDBY DK AS, Nordiske Kabel OG Traadfabriker AS filed Critical NKT BROENDBY DK AS
Publication of DE68912348D1 publication Critical patent/DE68912348D1/de
Application granted granted Critical
Publication of DE68912348T2 publication Critical patent/DE68912348T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Control Of El Displays (AREA)
DE68912348T 1988-06-24 1989-06-23 Verfahren zur phasenregelung eines taktgebers in bezug auf ein datensignal. Expired - Lifetime DE68912348T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DK348688A DK163397C (da) 1988-06-24 1988-06-24 Fremgangsmaade ved regulering af en taktgenerators fase i forhold til et datasignal
PCT/DK1989/000157 WO1989012936A1 (en) 1988-06-24 1989-06-23 A method of adjusting the phase of a clock generator with respect to a data signal

Publications (2)

Publication Number Publication Date
DE68912348D1 true DE68912348D1 (de) 1994-02-24
DE68912348T2 DE68912348T2 (de) 1994-06-30

Family

ID=8123449

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68912348T Expired - Lifetime DE68912348T2 (de) 1988-06-24 1989-06-23 Verfahren zur phasenregelung eines taktgebers in bezug auf ein datensignal.

Country Status (8)

Country Link
US (1) US5161173A (de)
EP (1) EP0452317B1 (de)
AT (1) ATE100259T1 (de)
AU (1) AU3849089A (de)
DE (1) DE68912348T2 (de)
DK (1) DK163397C (de)
FI (1) FI109853B (de)
WO (1) WO1989012936A1 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL96808A (en) 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5148113A (en) * 1990-11-29 1992-09-15 Northern Telecom Ltd. Clock phase alignment
US5230013A (en) * 1992-04-06 1993-07-20 Motorola, Inc. PLL-based precision phase shifting at CMOS levels
USRE38482E1 (en) 1992-05-28 2004-03-30 Rambus Inc. Delay stage circuitry for a ring oscillator
TW379293B (en) * 1994-04-01 2000-01-11 Ibm Apparatus and method for generating a clock in a microprocessor
US5557224A (en) * 1994-04-15 1996-09-17 International Business Machines Corporation Apparatus and method for generating a phase-controlled clock signal
US5712884A (en) * 1995-03-31 1998-01-27 Samsung Electronics Co., Ltd. Data receiving method and circuit of digital communication system
EP0758171A3 (de) * 1995-08-09 1997-11-26 Symbios Logic Inc. Datenabtastung und -rückgewinnung
US5684805A (en) * 1995-11-30 1997-11-04 Brown; Anthony Kevin Dale Microwave multiphase detector
US5930311A (en) * 1996-10-10 1999-07-27 Alcatel Usa Sourcing, L.P. Circuitry for retiming a received data signal
US6535023B1 (en) * 2000-05-12 2003-03-18 Cypress Semiconductor Corp. Linearized digital phase-locked loop method
JP4416351B2 (ja) * 2001-04-18 2010-02-17 富士通株式会社 位相比較回路及び光受信装置
US7826581B1 (en) 2004-10-05 2010-11-02 Cypress Semiconductor Corporation Linearized digital phase-locked loop method for maintaining end of packet time linearity
JP2009231896A (ja) * 2008-03-19 2009-10-08 Fujitsu Ltd 受信装置および受信方法
JP4656260B2 (ja) * 2008-06-20 2011-03-23 富士通株式会社 受信装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2213680C3 (de) * 1972-03-21 1974-08-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Nachstellen der Phasenlagen eines Referenzträgers und eines Schritt aktes
US4191976A (en) * 1978-09-26 1980-03-04 Data General Corporation Circuit indicating phase relationship
JPS5551100U (de) * 1978-10-02 1980-04-03
GB2061040B (en) * 1979-10-10 1983-08-10 Philips Electronic Associated Digital signal transmission system
JPS58182938A (ja) * 1982-04-21 1983-10-26 Toshiba Corp Pll形タイミング抽出回路
US4535459A (en) * 1983-05-26 1985-08-13 Rockwell International Corporation Signal detection apparatus
GB8414517D0 (en) * 1984-06-07 1984-07-11 British Telecomm Signal timing circuits
US4682121A (en) * 1985-02-04 1987-07-21 International Business Machines Corporation Phase discriminator and data standardizer
US4820994A (en) * 1986-10-20 1989-04-11 Siemens Aktiengesellschaft Phase regulating circuit
US4809306A (en) * 1986-11-17 1989-02-28 Amp Incorporated RF modem with improved clock recovery circuit
US4972443A (en) * 1987-11-24 1990-11-20 Siemens Aktiengesellschaft Method and arrangement for generating a correction signal for a digital clock recovery means

Also Published As

Publication number Publication date
DK163397C (da) 1992-07-13
WO1989012936A1 (en) 1989-12-28
EP0452317B1 (de) 1994-01-12
DK348688D0 (da) 1988-06-24
DK348688A (da) 1989-12-25
AU3849089A (en) 1990-01-12
FI109853B (fi) 2002-10-15
FI906355A0 (fi) 1990-12-21
EP0452317A1 (de) 1991-10-23
DE68912348T2 (de) 1994-06-30
ATE100259T1 (de) 1994-01-15
US5161173A (en) 1992-11-03
DK163397B (da) 1992-02-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: DSC COMMUNICATIONS A/S, BALLERUP, DK

8327 Change in the person/name/address of the patent owner

Owner name: TELLABS DENMARK A/S, BALLERUP, DK