FI86922B - FOERFARANDE OCH ANORDNING FOER KONTROLLERING AV INSKRIVNING I ETT MINNE. - Google Patents

Description

86922

Method and apparatus for controlling writing to memory

The invention relates to a method for controlling writing to a memory, in which a write-5 operation is allowed only within a predetermined time limit from writing a predetermined key code to a predetermined memory location.

RAM is a semiconductor memory that can store data quickly, which is why RAM is used in microcomputers in locations where fast data storage and reading is required. On the other hand, one of the characteristics of RAM is that it loses the data written to the memory when the operating voltage is removed. However, types of RAM that require little power to store data can also be used to store data during a power outage if they are provided with a backup power supply, such as a battery or accumulator.

In an ATM, RAM can be used, for example, to store money and fault information. This information is important for the operation of the machine as a whole, because without reliable information the operation of the machine can be blocked. The same data can be stored simultaneously in several different memory circuits, so that in the event of an error, operation can be continued with valid data. By using multiple memory circuits, the probability of incorrect processing of the same data is reduced if the interruption is considered to be caused by an interrupted write operation.

Inadvertently changing the contents of the RAM is, in one known solution, prevented by forcibly directing one of the signals controlling the write operation of the memory to a state that prevents writing to the memory. In this known solution, the so-called a circuit enable signal CE (chip enable) such that the CE signal 35 can be activated only by write memory periods assigned to the RAM 2 86922 which are executed within a specified time limit from writing the key code word to a memory location outside the RAM memory area. Thus implemented, the probability of accidentally entering 5 correct codewords into the correct memory location and performing erroneous writing to RAM is negligible.

When copying the contents of memory to another memory circuit, which operates in a so-called as a backup memory, the copy speed is of great importance: the operating voltage of the device-10 can be switched off at any time and copying may be interrupted. However, the faster copying can be performed, the lower the probability that copying will be interrupted and fail.

It is therefore an object of the present invention to provide a faster memory control enabling writing to memory.

This is achieved by a method of the type described in the introduction, which according to the invention is characterized in that after each successful write-write operation following the writing of the key code, a new write operation is allowed within a predetermined time limit from the previous one without writing a new key code.

The invention incorporates a feature enabling a new write operation to provide a key code: after each successful write operation to its RAM, the black guard allows a new write operation within a time limit without a new key code. That is, if the first write operation is performed correctly, the next write can be made without opening a separate time window with the key code. However, the invention maintains a time limit between write operations. Thanks to the invention, a long block of data can be written to RAM as fast as the memory controlling device is able to do - provided, however, that there is not too long a pause between write operations - without the time-consuming provision of a key code for each write operation.

The invention also relates to a device for controlling writing to a memory, the device comprising control means 5 for generating a memory activation signal in response to entering a predetermined key code to the control means, the control means including timer means triggered by entering the key code and preventing the memory activation signal from being generated The device is characterized in that the control means further comprise means for restarting the timer means within a predetermined time limit as a result of a key operation or a write operation performed from the previous write operation.

The invention further relates to the use of a device according to the invention in an ATM for copying cash and operating data from one memory to another for the purpose of storing data.

The invention will now be explained in more detail by means of an exemplary embodiment with reference to the accompanying figure.

The figure shows a circuit implementing the present invention, which generates one of the control signals written to the semiconductor memory 25, in this case the circuit selection signal CE. The signal CE can control the memory formed by one or more memory circuits.

The circuitry shown in the figure produces a circuit selection signal CE for both read and write operations.

Data can be read from the semiconductor RAM without restriction: when the memory area controlled by the circuit is assigned to read the RAM, the decoder circuit 4 sets its output signal RAMREAD to active state, i.e. 0, 35, whereby the output signal of AND gate 8 also enters its active state. memory.

However, writing to RAM is protected according to the invention.

5 Writing to the memory is started by pointing to the RAM memory register 1 outside the area to be written to and writing to the register a key code word of at least 2-bit, preferably 8-bit. The correct key code word activates the output RAM-10 of the enable register 1 by setting it to state 0. The signal RAMOK is fed through the AND gate 5 to the time limit timer 2, which then sets its output signal TIMEOK to active state 0 and starts counting the time limit. The TIMEOK signal is applied to the second input of OR gate 7.

A signal RAMWR from the decoder circuit 3 is applied to the second input of the OR gate 7, which sets the signal RAMWR to the active state 0 when the memory area controlled by the circuit is assigned to write to the RAM. If the write operation takes place within the time limit, i.e. when the signal-20 to TIMEOK is 0, the output of OR gate 7 changes its state to active, i.e. 0, and thereby also activates the signal CE.

If the write operation does not take place within the given time limit, the time limit timer 2 forcibly directs the signal 25 to the TIMEOK state 1, which prevents the output of the OR gate 7 and thereby the activation of the signal CE even if RAMWR is activated as a result of the write attempt.

The signals RAMWR and TIMEOK are also applied to the inputs of OR gate 6. The output of the OR gate 6 is connected 30 to the AND gate 5, the second input of which has the signal RAMOK.

If the write operation takes place within a given time limit, i.e. when the signal TIMEOK is in state 0, both inputs of OR gate 6 are zero at the same time, which activates the output of gate 6 and resets time limit timer 2 via AND gate 5. In this case, it is again possible to perform a new write operation within the time limit, which again resets the timer 2. If the write operation is not performed within the time limit 5 and the signal TIMEOK changes its state, it prevents the setting of the timer 2 via the OR gate 6. In this case, writing is only possible by rewriting the key code word in register 1.

The invention is particularly applicable to a system in which 10 have at least two RAM circuits for storing data and in which one RAM circuit is used to copy data from one or other RAM circuits. In this case, the data to be stored is copied in blocks from one memory circuit to another. Several memory-15 circuit write operations are used to copy each block. According to the invention, it is necessary to write at least a 2-bit key codeword to an external register in order to start copying. There must be no delay exceeding the given time limit between two consecutive data write times, otherwise the key code word must be re-entered. The time limit is the time taken by the controlling device to read the data from one and write to the other memory circuit plus the time spent on the additional operations required for copying. In a preferred embodiment of the invention, the time limit is of the order of 5 ps.

The invention is particularly well suited for use in the above-described copying of cash and operating data in a cash machine or other similar ATM.

The figure and the related description are intended only to illustrate the invention. The details of the invention may vary within the scope of the appended claims.

Claims (4)

1. Memory reading control method, in which method the read operation is allowed only within a predetermined time limit after writing a predetermined key code in a given memory location, characterized in that after each successful read operation that follows the writing of the key code is allowed a new read operation within a predetermined time limit after the previous one without writing a new key code. Method according to claim 1, characterized in that the key code is written to a memory area other than the read operation directed to. A memory reading control device, comprising means (1 - 8) for generating a memory activation signal (CE) in response to writing a predetermined key code to the control means, the control means including timing means (2), which is started by writing of the key code and which prevents the generation of the memory activation signal (CE), where a predetermined time elapses since the writing of the key death, characterized in that the control means further comprise means (3, 5, 6) for restarting the timing means (2) within a predetermined time. time limit after writing the key code or after the previous read operation as a result of the read operation performed. Use of the device according to claim 3 in a money machine for copying cash and function information from one memory to another memory for securely storing the information.