PL292013A1 - Method and device for controlling memory entry - Google Patents

Method and device for controlling memory entry

Info

Publication number
PL292013A1
PL292013A1 PL29201391A PL29201391A PL292013A1 PL 292013 A1 PL292013 A1 PL 292013A1 PL 29201391 A PL29201391 A PL 29201391A PL 29201391 A PL29201391 A PL 29201391A PL 292013 A1 PL292013 A1 PL 292013A1
Authority
PL
Poland
Prior art keywords
memory entry
controlling memory
controlling
entry
memory
Prior art date
Application number
PL29201391A
Inventor
Jouko Laatikainen
Original Assignee
Raha Automaattiyhdistys
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raha Automaattiyhdistys filed Critical Raha Automaattiyhdistys
Publication of PL292013A1 publication Critical patent/PL292013A1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/20Address safety or protection circuits, i.e. arrangements for preventing unauthorized or accidental access
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1433Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a module or a part of a module
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Storage Device Security (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
PL29201391A 1990-01-05 1991-01-02 Method and device for controlling memory entry PL292013A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI900063A FI86922C (en) 1990-01-05 1990-01-05 FOERFARANDE OCH ANORDNING FOER KONTROLLERING AV INSKRIVNING I ETT MINNE

Publications (1)

Publication Number Publication Date
PL292013A1 true PL292013A1 (en) 1992-03-23

Family

ID=8529649

Family Applications (1)

Application Number Title Priority Date Filing Date
PL29201391A PL292013A1 (en) 1990-01-05 1991-01-02 Method and device for controlling memory entry

Country Status (9)

Country Link
EP (1) EP0507811A1 (en)
JP (1) JPH05502957A (en)
AU (1) AU640442B2 (en)
CA (1) CA2070986A1 (en)
FI (1) FI86922C (en)
HU (1) HU207593B (en)
NO (1) NO922652L (en)
PL (1) PL292013A1 (en)
WO (1) WO1991010192A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993007565A1 (en) * 1991-10-01 1993-04-15 Motorola, Inc. Memory write protection method and apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4493031A (en) * 1982-08-25 1985-01-08 At&T Bell Laboratories Memory write protection using timers
DE3325887A1 (en) * 1983-07-19 1985-01-31 Bosch Gmbh Robert METHOD AND DEVICE FOR PROTECTING THE INFORMATION ENTERED BY MEANS OF A KEYBOARD IN A RAM
US4796235A (en) * 1987-07-22 1989-01-03 Motorola, Inc. Write protect mechanism for non-volatile memory

Also Published As

Publication number Publication date
FI86922B (en) 1992-07-15
FI900063A0 (en) 1990-01-05
CA2070986A1 (en) 1991-07-06
AU6973891A (en) 1991-07-24
WO1991010192A1 (en) 1991-07-11
AU640442B2 (en) 1993-08-26
HU9202106D0 (en) 1992-10-28
HUT61109A (en) 1992-11-30
EP0507811A1 (en) 1992-10-14
NO922652D0 (en) 1992-07-03
JPH05502957A (en) 1993-05-20
NO922652L (en) 1992-07-03
FI86922C (en) 1992-10-26
HU207593B (en) 1993-04-28
FI900063A (en) 1991-07-06

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