FI83467B - Processorsystem. - Google Patents

Processorsystem. Download PDF

Info

Publication number
FI83467B
FI83467B FI840290A FI840290A FI83467B FI 83467 B FI83467 B FI 83467B FI 840290 A FI840290 A FI 840290A FI 840290 A FI840290 A FI 840290A FI 83467 B FI83467 B FI 83467B
Authority
FI
Finland
Prior art keywords
stations
data
microcomputer
microcomputers
line
Prior art date
Application number
FI840290A
Other languages
English (en)
Finnish (fi)
Other versions
FI83467C (sv
FI840290A0 (fi
FI840290A (fi
Inventor
Anthony Robert Allwood
Original Assignee
British Telecomm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by British Telecomm filed Critical British Telecomm
Publication of FI840290A0 publication Critical patent/FI840290A0/fi
Publication of FI840290A publication Critical patent/FI840290A/fi
Publication of FI83467B publication Critical patent/FI83467B/fi
Application granted granted Critical
Publication of FI83467C publication Critical patent/FI83467C/sv

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/407Bus networks with decentralised control
    • H04L12/417Bus networks with decentralised control with deterministic access, e.g. token passing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Traffic Control Systems (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Saccharide Compounds (AREA)

Claims (4)

1. Multiprocessorsystem, omfattande ett gemensamt kommunika-tionsorgan, som förenar en grupp dataprocessorstationer med motsvarande identifieringskoder, kännetecknat därav, att till det gemensamma kommunikationsorganet hör en gemensam dataledning (7) och en gemensam styrledning (3, 4)? data-processorstationerna har individuella koder och fungerar van-ligen asynkront; en huvuddataprocessorstation (6) har anordnats som anpassats för att utföra software-tidsplaneringsberakningar och som genom förmedling av dataledningen (7) anslutits till gruppen dataprocessorstationer (5) och till triqger-bildnings-organ (2) för att bilda en triggersignal till styrledningen (3, 4) för oaböriande av en datakommunikationssekvens, vilken sekvens omfattar skriv- och lässteq, stationerna (5) har anoas-sats för att utföra de efter trigger-steqet följande, tili de-ras individuella koder anslutande motsvarande software-tidspla-neringsberäkningar, varvid nämnda grupp stationer (5) i skrivs-teget skriver vilken som heist information till huvudstationen (6) under motsvarande, av motsvarande software-tidsplanerings-beräkningar bestämda tidsperioder för dataledningen, och i lässteget skriver huvudstationen (5) informationen till dataledningen (7) för läsning av ett enskilt organ i nämnda grupp stationer (5) efter motsvarande tidsperioder.
2. Multiprocessorsystem enligt patentkravet 1, kännetecknat därav, att till tidsplaneringsberäkningarna hör en serie programsteg, som alia fyller samma tidsperiod, varvid de utförda stegens antal i varje nämnd processor star i relation deras individuella koder.
3. Multiprocessorsystem enliqt oatentkravet 1 eller 2, kännetecknat därav, att till de nämnda dataprocessorsta-tionerna hör mikrodatorer. i3 83467
4. Multiprocessorsystem enligt nagot av de föregäende patent-kraven, kännetecknat därav, att dataprocessorsta-tionerna (5) är väsentligen i form av identiska kort (10) och de individuella koderna är stationsadresser definierade av bak-sidans sparföring (8), i vilken korten placerats.
FI840290A 1983-01-27 1984-01-25 Processorsystem FI83467C (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB838302319A GB8302319D0 (en) 1983-01-27 1983-01-27 Processor systems
GB8302319 1983-01-27

Publications (4)

Publication Number Publication Date
FI840290A0 FI840290A0 (fi) 1984-01-25
FI840290A FI840290A (fi) 1984-07-28
FI83467B true FI83467B (fi) 1991-03-28
FI83467C FI83467C (sv) 1991-07-10

Family

ID=10537060

Family Applications (1)

Application Number Title Priority Date Filing Date
FI840290A FI83467C (sv) 1983-01-27 1984-01-25 Processorsystem

Country Status (14)

Country Link
EP (1) EP0123371B1 (sv)
JP (1) JPS59172058A (sv)
KR (1) KR840007287A (sv)
AU (1) AU565877B2 (sv)
CA (1) CA1209713A (sv)
DE (1) DE3473948D1 (sv)
DK (1) DK165143C (sv)
ES (1) ES8500533A1 (sv)
FI (1) FI83467C (sv)
GB (1) GB8302319D0 (sv)
NO (1) NO167609C (sv)
NZ (1) NZ206951A (sv)
PT (1) PT78018B (sv)
ZA (1) ZA84608B (sv)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT412315B (de) * 2002-01-17 2004-12-27 Bernecker & Rainer Ind Elektro Anlage zum übertragen von daten

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2259223A1 (de) * 1972-12-04 1974-06-27 Licentia Gmbh Schaltungsanordnung zum verbinden einer mehrzahl von binaere informationen abgebende als auch aufnehmende einrichtungen
DE2442736B1 (de) * 1974-09-06 1976-02-12 Vdo Adolf Schindling Ag, 6000 Frankfurt Digitales Datenübertragungssystem
DE2533330C3 (de) * 1975-07-25 1981-08-13 Siemens AG, 1000 Berlin und 8000 München Verfahren und Einrichtung zur Übertragung von Meßwerten in einem Brandmeldesystem
GB2006491B (en) * 1977-07-02 1982-01-06 Ml Eng Plymouth Data transmission system
JPS5721140A (en) * 1980-07-15 1982-02-03 Ricoh Co Ltd Communication system

Also Published As

Publication number Publication date
DK39384D0 (da) 1984-01-27
GB8302319D0 (en) 1983-03-02
PT78018B (en) 1986-04-18
NO167609B (no) 1991-08-12
CA1209713A (en) 1986-08-12
KR840007287A (ko) 1984-12-06
EP0123371A1 (en) 1984-10-31
ZA84608B (en) 1985-03-27
DK165143B (da) 1992-10-12
FI83467C (sv) 1991-07-10
ES529500A0 (es) 1984-11-01
DK39384A (da) 1984-07-28
DE3473948D1 (en) 1988-10-13
JPS59172058A (ja) 1984-09-28
NZ206951A (en) 1987-11-27
PT78018A (en) 1984-02-01
AU2385184A (en) 1984-08-02
FI840290A0 (fi) 1984-01-25
EP0123371B1 (en) 1988-09-07
DK165143C (da) 1993-03-01
ES8500533A1 (es) 1984-11-01
NO840314L (no) 1984-07-30
NO167609C (no) 1991-11-20
FI840290A (fi) 1984-07-28
AU565877B2 (en) 1987-10-01

Similar Documents

Publication Publication Date Title
FI74574C (sv) Sätt att kommunicera mellan ett flertal terminaler samt digitalkommuni kationsanordning med fördelad styrning för tillämpning av sättet.
FI74573C (sv) Digitalomkopplingselement med flera portar.
US4213201A (en) Modular time division switching system
FI74861B (fi) Digitalomkopplingsnaet.
US3856993A (en) Time division multiplex exchange
CA2041209C (en) Tone and announcement message code generator for a telephonic switching system and method
CA1266536A (en) High speed bit interleaved time division multiplexer for multinode communication systems
CA1248209A (en) Reliable synchronous inter-node communication in a self-routing network
US4377859A (en) Time slot interchanger and control processor apparatus for use in a telephone switching network
KR920004129B1 (ko) 교환장치 및 이 장치내에서의 통신로 설정방법
JPH021671A (ja) パケット交換機の負荷制御方式
US4769839A (en) Method and device for the transfer of data in a data loop
CA1147865A (en) Message interchange system among microprocessors connected by a synchronous transmitting means
US6430218B1 (en) Communication control apparatus
FI83467B (fi) Processorsystem.
EP0280670B1 (en) Method and apparatus for transmitting information via a bus system
US4413336A (en) Process for transmitting data with the aid of a start-stop signal
US4720828A (en) I/o handler
US4634812A (en) Method of transferring information between microcomputers in a decentralized process control system, particularly for telephone systems
JPS60240296A (ja) データ処理システムの制御方法及びデータ処理システム
JPH06311574A (ja) 網同期制御方法
JPS63227149A (ja) ル−プ状通信システムにおける通信制御方法
JPS6063654A (ja) 共通並列バス方式
JPS5888992A (ja) 状態監視方式
JPH03132196A (ja) 装置状態変化検出方式

Legal Events

Date Code Title Description
MM Patent lapsed
MM Patent lapsed

Owner name: BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY