FI77132B - VARIABEL HORISONTAL-AVBOEJNINGSSTROEMKRETS, SOM AER I STAOND ATT KORRIGERA OEST-VAEST-DYNFOERVRIDNINGEN. - Google Patents

Description

1 77132

The invention relates to a deflection circuit in which the amplitude of the deflection current can be changed over a relatively wide range without changing the amplitude of the high voltage or the return time of the deflection. Modulation of the deflection current amplitude is desired for purposes such as correction of east-west pillow distortion, image width adjustment, or the like.

Common disadvantages of known east-west correction circuits are that they consume a relatively large amount of power, impose limitations in the design of certain linearity correction circuits, or cause undesired return-time modulation. In addition, some east-west correction circuits require additional components connected in series in the path of the deflection current. This series connection complicates the design of the linearity correction circuits, which requires a grounded S-correction capacitor circuit for proper operation.

The systems of the invention, which are generally described, do not have such disadvantages. According to an aspect of the present invention, a controllable switch 25 operating at a deflection speed is connected to the deflection winding to generate a sweep current in the winding during the line of the deflection period. The deflection-return capacitance forms a deflection-return-resonance circuit with the deflection coil at the return time. The inductance of the power supply is connected to a second capacitance and a controllable switch to form a second resonant circuit at the return time to generate a voltage pulse which switches the current to the consumption circuit. At the return time, the two resonant circuits are mainly separated at the return of the deflection 35 and at higher frequencies. This disconnection avoids the undesired interaction of the two circuits.

2 77132

In one embodiment of the invention, the disconnection of the two resonant circuits is performed by placing a relatively large inductive impedance between the two resonant circuits at the return time.

5 The switch that can be controlled during the line switches off current from impedance, deflection winding and power supply inductance.

According to the second aspect of the present invention, the correction of the east-west pillow distortion is also provided by switching the impedance to a source of modulation current that varies with the vertical frequency. During the return time, energy is supplied to the return resonant circuit in a manner that is controlled by the amount of modulation current provided by the modulation source. By varying the modulation current at a vertical rate of 15 parabolically, the energy fed back to the resonant circuit also varies at the vertical rate. The peak current flowing in the deflection winding at the beginning of the line also varies parabolically at the vertical velocity to provide correction for east-west cushion distortion. 20 In the drawing:

Figure 1 shows a deflection circuit according to the invention with sweep current amplitude control;

Figures 2-4 show waveforms related to the operation of the circuit of Figure 1; Figure 5 shows a different implementation of a deflection circuit according to the invention with sweep current amplitude control;

Figures 6-8 show waveforms associated with the operation of the circuit of Figure 5; Fig. 9 shows a deflection circuit according to the invention with east-west pillow distortion correction; and

Figure 10 shows the waveforms associated with the operation of the circuit of Figure 9.

In Fig. 1, the source of the regulated B + DC voltage generated between the terminal 21 and ground is connected through a resistor R1 and filtered by a capacitor C1371 32 to the first terminal of the winding w1 of the horizontal output transformer T. The second terminal of the winding wl is connected to the junction terminal 22.

The collector-emitter-5 path of the horizontal output transistor Q1 is connected between the terminal 22 and ground. Two rectifiers connected in series, diodes D1 and D2, are connected in parallel with transistor Q1. Horizontal deflection coil L „and S-correction or line capacitor n

The Cg adapter assembly is connected between the anode and cathode electrodes of the diode D1.

The deflection return capacitor C is connected

KD

the series connection of the deflection winding L „and the return capacitor C„

Π O

over the system. The second return capacitor C is

KT

arranged to take care of forming the reso-15 nance circuit 30 with the winding wl of the transformer T. A capacitor CRT is connected between terminal 22 and ground. A series connection of a relatively high-impedance choke Li and an adjustable source 24 of a direct voltage V is arranged between the base plate of the return capacitor Cg and ground.

Consider the operation of the power supply and horizontal deflection circuit of Figure 1 when the adjustable voltage source 24 is assumed to have some positive DC voltage V with respect to ground and is less than B +. The waveforms 25 of Figures 3a-3e are then valid.

During the initial part of the horizontal line gap, the diode D1 is conductive, making it possible to supply the line voltage developed over the line capacitance Cg over the horizontal deflection coil L „. As shown in Fig. 3e, at the same time n 30 as the line voltage is applied over the horizontal deflection coil L n, the horizontal sweep current i ^ is negative, but has a positively rising sawtooth waveform.

During the beginning of the line, the diode D2 is also conductive, receiving a voltage at the terminal 22 mainly from the ground 35 potential. Controlled B + voltage across the winding wl of the horizontal output transformer 4 771 32 T, which develops a positively rising sawtooth current iT, as shown in Fig. 3b. When the diode D2 is a conductive adjustable voltage source 24, a voltage is applied across the induction choke L1 to generate a low sawtooth current i1, as shown in Fig. 3c.

To cause the positive currents i and iT to flow, the horizontal oscillator and controller 23 bias the horizontal output transistor Q1 just before the center of the horizontal-10 line time. During the latter part of the horizontal line run, the positive horizontal scanning current i flows from the right-hand terminal of the horizontal deflection coil Lu through the horizontal output transistor Q1, through the diode D2 to the bottom terminal of the line capacitor Cc. Diode D1 becomes biased in the blocking direction b 15 when the horizontal output transistor Q1 conducts collector current in the forward direction. The positive current i ^ in the winding w1 or in the horizontal output transformer T flows to ground through the horizontal output transistor Q1.

To initiate the horizontal return time, the horizontal oscillator-20 and the controller 23 supply a bias signal in the blocking direction to the base of the horizontal output transistor Q1 to change the forward collector to the closed state shortly thereafter. When the horizontal output transistor Q1 is in the closed state, the horizontal deflection coil L „forms a return resonant circuit with the deflection-25 return capacitor CDri.

KU

25 to generate a return voltage pulse V.

KU

Similarly, after the horizontal output transistor Q1 is closed, the winding W1 of the horizontal output transformer T forms a second resonant circuit 30 with the second return capacitor CDm 30. The value of the return capacitor CRT depends on the effective value of the

Il 5 77132

The pulse voltage that develops over the transformer return capacitor C_ is the voltage VI shown in Fig. 3a. A similar AC pulse voltage develops across the winding wl of the horizontal output transformer T. This pulse voltage is connected via 5 transformers via the transformer to the other windings of the transformer, which are collectively shown in Figure 1 by a single winding w2. The converted pulse voltages, after proper rectification and filtering, energize the various consumption circuits of the television receiver, not shown in Figure 1. The amplitude of the pulse voltage across the voltage VI and the coil wl is proportional to the magnitude of the B + voltage. Thus, by controlling the voltage B2, these pulse voltages are also controlled.

15 The amplitude of the horizontal scanning current i and thus the amplitude of the return pulse voltage V are the return capacitor

Fg average functions of the return voltage developed over the plates. Since no voltage having a DC voltage component develops over the inductance, the average return voltage is given a value equal to the difference between DC voltage B + and DC voltage V.

By changing the magnitude of the adjustable voltage V generated by the source 24, the average return voltage and thus the sweep peak-25 current can be varied at the same time.

For example, when the modulation voltage Vm is equal to the voltage B +, the current i ^ in the choke Li is substantially zero, as shown in Fig. 2c. As a result, the current from the winding wl of the horizontal output transformer T is not energized to the deflection resonant circuit 25. No energy B + from the voltage power supply can be transferred to maintain the current in the deflection winding L „. The deflection current i is c H y therefore = O as shown in Fig. 2e.

The waveforms of Figures 3a-3e show a case where the magnitude of the modulation voltage V 1 is adjusted to be slightly smaller than the magnitude of the B + voltage. The modulation current iL ^ is shown in Figure 3c. During the return current i, flows to the inductor LI deflection-return capacitor

L JL

through the CRD of the transmitter. The resulting additional charge in the condenser-5 transmitter CDri is transferred during the return to the horizontal deflection

KU

to the coil L „to compensate for the resistive losses that occur during each deflection period. Since the modulation voltage is reduced in magnitude compared to the magnitude it has in the case of the waveforms of Figures 2a-2e, the average line voltage equal to the difference between the B + voltage and the modulation voltage is larger. The amplitude of the deflection current i has increased from zero in Fig. 2e to one of the non-zero values in Fig. 3e. The deflection-return pulse-15 voltage V, which is equal to the voltage VI minus V2, has also increased to some non-zero amplitude.

Further reduction of the modulation voltage to zero, whereby the modulation voltage source 24 will correspond to a short-circuited circuit, results in the waveforms of Figures 4a-4e. In this situation, the deflection current i has reached its maximum amplitude value. Since the amplitude of the deflection current i has increased in Fig. 4e compared to Fig. 3e, the receptive loss in the deflection-25 winding LR has also increased.

Thus, the average modulation current i ^ is also increased as shown in Fig. 4c. Since the current iL ^ is obtained during the return from the current iT flowing in the winding w1 of the horizontal-input-transformer T, the positive peak value of the current iT of the transformer winding-30 has increased by the increase of the average current iL ^.

The inductor L1 is in the circuit of the deflection-return resonant circuit 25 and in the circuit of the transformer return-resonant circuit 30 substantially throughout the deflection-return 35. As a result, the impedance of the circuit,

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7 77132 connected to the deflection-return resonant circuit 25 does not change and no significant deflection-return time modulation occurs. It should be noted that the voltage VI py-5 developed at the terminal 22 of the return winding w1 remains unchanged when the modulation voltage V is varied. Thus, the acceleration voltage and other DC voltages obtained by rectifying and filtering the voltages developed over the secondary windings of the horizontal output transformer T, such as the winding w2, are not affected by modulating the horizontal scanning current i1.

Using two return capacitors, the first return capacitor CDri deflection-return resonance

for circuit 25 and another return capacitor CD

KT

for the transformer-resonant circuit 30, the energy-15 flow during the return can be

independently adjusts the pulse voltage VI generated by the transformer-return resonant circuit 30 to its amplitude without affecting it. With a relatively high-impedance choke L1 connected from the winding w1 of the horizontal output transformer 20T to the deflection return resonant circuit 25 in the current path, the two resonant circuits 25 and 30 are mainly disconnected at the return frequency or higher frequencies. Thus, any modulation of the pulse voltage VI caused by variations in the load 25 in the load circuits to which they turn on does not cause a deflection return of the pulse voltage V

KU

unwanted modulation.

During the return, the effect of the capacitor Cg can be ignored because its capacitance is much higher than that of the capacitor CD. Thus, the resonant circuit 25 comprises a parallel connection of the deflection coil L and

B

deflection-return capacitor CD. Such a circuit

K

ä has a high impedance at the resonant frequency and a low impedance at other frequencies. Since the circuit 25 is controlled by a high impedance 35, an inductor L1, the circuit 25 acts like a filter. The impedance of circuit 25 is high only at the s 77132 deflection-return frequency (44 kHz). Therefore, all voltages generated by the horizontal output transformer T at frequencies substantially different from the deflection-return frequency occur for more than 5 reasons because the impedance of the inductor L1 is much higher than the impedance of the deflection-return resonant circuit 25 at these different frequencies.

By connecting the choke Li between the ground and the deflection return capacitor CRD base plate terminal 27, the resonant circuit 25 of the cross-return is allowed to float above the ground potential during the return time. Thus, during the return, the voltage in the top plate of the return capacitor CDri, terminal 22, is equal to the sum of the deflection return pulse voltage V and the voltage V2 developed between the terminal 27 and ground. This arrangement results in the aforementioned disconnection or disconnection of the two resonant circuits 25 and 30 during return at frequencies equal to or greater than the deflection return frequency.

Figure 5 shows another embodiment of the invention in which the line capacitor Cg is grounded as well as the deflection return resonant circuit 25. The circuit elements of Figures 1 and 5, denoted by the same reference numerals, operate in the same way or show similar quantities. In the power supply and modulated deviation circuit of Figure 5, the inductor L1 is connected to the junction of diodes D1 and D2 at terminal 27. The transformer return capacitor CDm, instead of being connected between terminal 22 and ground, is now connected to terminal 30 in Figure 5. 22 and the left-hand terminal of the inductor at terminal 27. In such an arrangement, a transformer-resonant circuit 30 formed by a winding w1 and a transformer-return capacitor CRT is maintained floating above ground potential during its resonant-return time.

Il 771 32 9

The arrangement of Figure 5 has the advantage of using a grounded line capacitor C. Such an arrangement is required within certain linearity correction circuits such as those described in U.S. Pat. in patent application no.

5,363,516 filed by P.E. Haferl, March 30, 1982, entitled "Linearity Corrected Horizontal Deflection Circuit", corresponding to UK Patent Application 2098424A, published November 17, 1982. The circuits in Figures 1 and 5 have in common that the inductor 10 Li acts as a high impedance for high frequency currents flowing between the two resonant circuits 25 and 30.

The amplitude modulation of the horizontal scanning current i is obtained in Fig. 5 in the same manner as it is obtained in Fig. 1. Figs. 6a to 6e show a situation in which the modulation voltage of Fig. 5 is zero. As a result, the current iL1 in Fig. 6c is also zero, as is the voltage V2 between terminal 27 and ground. When the current flowing in the inductor Li is zero, the current path to ground through the inductor 20 and the source 24 is in fact an open circuit.

The deflection return pulse voltage VRD has an amplitude determined exclusively by the control voltage B + in the same way, the deflection current i has an amplitude determined exclusively by the voltage B +.

Figures 7a-7e show a situation in which the modulation voltage is increased somewhat above zero. The current iL ^ flows through the diode D1 during the horizontal line and also through the horizontal output transistor Q1 when it conducts the collector current downstream. During horizontal return, the inductor L1 is connected in series with the transformer-return resonant circuit 30. The pulse voltage V2 is applied to the cathode of the diode D3 through a high value filter capacitor C1 to create a closed state in the diode during the return. The deflection return voltage 35 V__ is the sum of the voltage V2 and the return pulse voltage VI 'developed over the transformer-return capacitor C.

K Γ 10 771 32 The average of the voltage V2 is equal to the magnitude of the modulation voltage V. Thus, the average value of the return pulse voltage V „m sr sr j rd and the amplitude of the sweep current i increase as the modulation voltage Vm increases. Since the voltage B + is adjusted, the voltage VI 'remains unchanged in average as well as in amplitude.

A further increase in the current i ^ due to a further increase in the modulation voltage causes the waveforms of Figures 8a-8e. The amplitude of the pulse voltages-10 tea V2 increases, and as a result, the amplitude of the deflection return pulse voltage VD_ and the amplitude of the deflection current i increase, as shown in Figs. 8a and 8e. It should be noted that the current i in the winding wl of the horizontal-input-transformer T remains unchanged when the modulation voltage Vm 15 changes because the current i ^ during the return flows through the deflection return resinant circuit 25 through the return capacitor CD_ and not through the winding wl.

When comparing the similarities and differences in the operation of the circuits of Figures 1 and 5, it should be mentioned that the sweeping current i of the circuit 20 of Figure 1 can be varied from almost zero to a value determined by the voltage B +? while the sweep current i of the circuit of Fig. 5 can be varied from a value determined by the voltage B + to a value determined by the maximum quantity which the modulation voltage V is allowed to reach. One limiting factor for the maximum magnitude of the voltage V 1 is the maximum voltage stress that is allowed to be applied between the collector and emitter electrodes of the horizontal output transistor Q1. The pulse voltage applied to the collector of the horizontal output transistor Q1 is constant in the circuit of Figure 1 but varies in the circuit of Figure 5. The current iT varies in the circuit of Figure 1, but remains constant in the circuit of Figure 5. In the circuits of both Figs. 1 and 5, if the amplitude of the modulation voltage Vm is changed parabolically with the vertical frequency, the amplitude of the horizontal scanning current i 35 is similarly modulated to provide east-west cushion distortion correction.

Il 11 77132

Figure 9 shows a power supply and modulating deflection circuit embodying the invention, in which the primary winding of the horizontal-input-transformer is connected to a circuit breaker power supply and the horizontal deflection circuit is connected to the secondary windings of the transformer. The elements of Figures 1, 5 and 9, denoted by the same reference numeral, operate in the same way or represent similar quantities.

In Figure 9, the winding w2 'of the horizontal output transformer T is connected to an intermittent power supply 50, such as 10 sicos power supplies (sicos = the single conversion system) described in U.S. Pat. in patent application no. 333,610, filed December 22, 1981 by P.E. Haferl and entitled regulated deflection circuit and corresponding to UK Patent Application No. 1594085A, published September 8, 1982.

The arrangement of Fig. 9, like the arrangement of Fig. 5, comprises a grounded S-correction capacitor Cg to enable the use of a linear circuit not shown in Fig. 9. In Fig. 9, the modulation circuit 26 20 takes care of correcting the east-west pillow distortion while maintaining the pulse voltage VT amplitude across the winding wl ', which is controlled by a circuit breaker power supply. The deflection resonant circuit 25 and the transformer resonant circuit 30 are each tuned to the deflection-return frequency.

When a sicos-type circuit breaker power supply is used, the effective inductance in the winding w11 is relatively high, and thus the return capacitors CRT and CRD ^ RD2 'associated with these two resop circuits are selected to be approximately equal.

During the horizontal line gap, the transformer-return capacitor CDfn and the DC blocking capacitor C1 are connected to ground through a conducting diode D2 or a conductive diode D1 and a conductive horizontal output transistor Q1. During the first half of the horizontal return interval, the transformer-35 resonant circuit 30 and the deflection-return resonant circuit »77132 25 each produce a pulse voltage V or V by transferring the inductively charged energy to a capacitively charged energy charged to the respective return capacitors CRT or RD2 immediately thereafter to the corresponding inductances wl 'or during the second half of the return period.

The pulse voltage VT is sampled from the tap of the horizontal output transformer T winding w2 'and used in a cut-off power supply 50 to adjust the amplitude of the pulse voltage as the supply voltage and load of the network vary. Energy is transferred from the interruptible power supply 50 during return through the windings w + 'and wl1 to the transformer resonant circuit 30 and other return-controlled load circuits 15 connected to the other secondary windings w3'-w5'.

For example, the resistive losses generated in the horizontal deflection winding L1 are compensated for each energy transferred through the horizontal return period diode D2 to the transformer resonant circuit 30. As another example, a controlled pulse voltage V1 generated in the horizontal output transformer winding T is with a winding w5 'for switching current to the high-voltage acceleration circuit 31 and for generating a controlled acceleration-DC voltage at the acceleration terminal U.

Suppose now that a current i2 having some assumed magnitude flows through the winding wb of the transformer T2 of the modulation circuit 26. During the horizontal line period, current i2 flows from ground through the coil and diode D4 to terminal 27, which is at ground potential because diode D1 and either diode 30 D2 or horizontal output transistor Q1 conduct. During the horizontal return period, the transistor Q1 is in the closed state. if the current i2 is greater than the current flowing through the diode D2, D2 is also in the closed state. The current i? Deflection-return-pulse voltage

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13 771 32

Vrd and, the voltage difference between the sum of the controlled transformer pulse voltage VT and the voltage across the capacitor C1 occurs across the diode D2 as the pulse voltage V2.

During the return, between Figures 10a-10g, to-t1 or 5 to'-t1 ', the current i2 decreases. If the inductance in the winding of the transformer T2 is large enough, the current i2 does not decrease to zero at the end of the horizontal return time. Thus, the coil is connected via the transformer resonant circuit 30 to the deflection return circuit 25 substantially throughout the horizontal return time.

10 Therefore, the changes in the amplitude of the current i2 do not produce any significant return time modulation of the deflection-return pulse voltage VRD.

Since two separate resonant circuits 25 and 30 are involved in generating the two pulse voltages VRD and VT, the waveform of the pulse voltage VT may tend to change the voltage at the acceleration terminal U or the voltage changes in the winding w41 with the jet current without simultaneously causing a deflection return voltage. Transformer T2 winding

KD

20 W, a relatively large inductance acts as a filter b to prevent such simultaneous modulation or return pulse voltage interference. Due to this fact, the horizontal synchronization pulse 44 used to synchronize the horizontal oscillator and the line guide 23 can be preferably taken from a capacitive voltage divider.

Crdi * CRD2 and not the horizontal output transformer T winding.

In Figures 10a-10g, the envelope of the waveforms shows the vertical waveform changes produced by the modulation circuit 26 required to correct the east-west pillow distortion of the raster 30.

The modulation circuit 26 generates a variable current i2 to change the amplitude of the deflection-return pulse current and thus simultaneously to change the amplitude of the horizontal scanning current i1. The switching transistor Q2, the operation of which is controlled in the return converter by the rectifier D4, regulates the amplitude of the current i2. As shown in Fig. 10a by the collector voltage V3 of the transistor Q2 of 14 771 32, the transistor Q2 conducts before the start of the horizontal return time, before the time t0 or tO '. The voltage V3 is zero before time to and the current il flowing in the winding w of the transformer T2 is close to its maximum value, as shown in Fig. 10b.

At time t0, the voltage 81 above the winding w3 'of the horizontal output transformer T changes the polarity and causes the diode D5 to be closed. The current in the wind dampens rapidly to zero near time t0, as shown in Fig. 10b. The blocking voltage 46, which is generated during the return by a negatively propagating switching waveform at the output of the voltage comparator UIA, is applied to the base of the switching transistor Q2. It should be noted that the current il in the winding w of the transformer T2 and in the collector of the switching transistor 15 is prevented from flowing with the blocking voltage of the diode D5 due to the opposite polarity across the winding w3 'of the horizontal transformer T and not the supply voltage to the switching transistor Q2. Thus, the storage time delay for the switching transistor 20 Q2 to close is negligible and is not a factor in turning off the current.

To maintain the continuity of the flux in the core of the transformer T2 near the time t0, the current rises rapidly, as shown in Fig. 10c. During horizontal return, this current flows from the winding through diode D4 to the transformer-return capacitor 0 „_. The voltage v2 shown in Fig. 10d is thus also a pulse voltage which develops during the return time, the pulse voltage is then applied to the winding w1 of the transformer T2. Applying a pulse voltage to the coil 30 causes the current i2 to decrease during horizontal return.

However, as shown in Fig. 10c, the current i2 does not decrease completely to zero before the horizontal return ends. If the current i2 had decreased to zero considerably before this time, the inductance would have become 35 disconnected from the two resonant circuits 25 and 30 during a substantial portion of the horizontal return and no unacceptable return time modulation would have resulted.

It is 77132

It should be noted that the voltage v2 starts to increase shortly after time to and starts to decrease to the ground reference voltage shortly before time t1. Such a phenomenon occurs because diode D2 has a close time delay when a blocking voltage is applied to the diode, and because just before time t1, diode D2 conducts some energy to transfer from the transformer resonant circuit 30 to the deflection-return resonant circuit 25.

At time t1, at the beginning of the next horizontal line period, the switching transistor Q2 10 does not conduct. The voltage V3 increases to the line voltage developed over the coil w3 'of the horizontal output transformer. The point connector of the winding of the transformer T2 is connected to the terminal 27 when the diode D4 conducts. Terminal 27 is at ground potential due to the conductivity of diode D2 just before time t1. The current i2 therefore flows with a substantially constant amplitude, as shown in Fig. 10c, after the diode D2 begins to conduct, until the switching transistor Q2 becomes conductive at some point in the interval 20 t2-t3. The time t2 corresponds to the center of the vertical beam, where a wide-amplitude horizontal deflection current is required to compensate for east-west cushion distortion. The time t3 corresponds to the upper or lower point of the vertical beam, where a narrower amplitude horizontal deflection current is required.

When the switching transistor Q2 conducts, a positive line voltage generated across the coil w3 'of the horizontal output transformer is applied across the coil w2 of the transformer T2. This voltage is connected to the winding by the operation of the transformer so that the point connector of the winding becomes nega-30 tight and makes the diode D4 in the closed state. The current in the i2 winding suddenly drops to zero. The stored energy in the transformer T2 generates a voltage in the winding w to cause a rapid increase in the current il, as shown in Fig. 10b, which starts at some point in the time interval 35 t2-t3.

16,771 32

From the moment when the switching transistor Q2 is connected to conduct, until the end time tO 'of the horizontal line period, energy is again stored in the transformer T2 with an increasing current il in the windings w, as shown in Fig. C115b. This energy is transferred through the winding to the transformer resonant circuit 30 and the return resonant circuit 25 during the return period tO'-t1 '.

To provide East-West pillow distortion correction, the switching transistor Q2 of the modulation circuit 26 is pulse-width modulated at the vertical frequency parabolically by the pulse width control circuit 40 of Fig. 9. The vertical sawtooth voltage 41 developed over the vertical deflection coil Lv is integrated to obtain a vertical parabolic signal 42 over the integrating capacitor 15. The parabola is inverted and amplified by transistor Q3. Some vertical sawtooth voltage is applied to transistor Q3 to the emitter through the trapezoidal resistor R1 to compensate for the slight tilt of the inverted parabolic signal 43.

The amplitude of the symmetrical inverted parabolic signal 43 generated by the collector of the transistor Q3 is set by a resistor R4 and fed through a DC blocking capacitor C4 to the inverting input terminal of the voltage comparator U1A. The Dc level in this input terminal 25 can be shifted somewhat relative to the DC level in the non-inverting input terminal by means of a width control resistor R6. The voltage comparator UlB is controlled by horizontal return pulses 44 to provide a horizontal frequency sawtooth mass signal 45 across capacitor C5. By comparing this horizontal sawtooth signal to the vertical parabolic signal applied to the non-inverting input terminal of the comparator UlA, the comparator UlA provides the required pulse width modulated switching signal 46 at its output terminal, which is applied at the base of the transistor Q2.

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Increasing the amplitude of the parabolic signal 43 by adjusting the amplitude control resistor R4 results in an increase in the time interval t2-t3 of Figs. 10a-10c, which provides a larger amount of pad correction. Reducing the DC voltage level difference 5 between the inverting and non-inverting terminals of the comparator UlA by adjusting the width adjustment resistor R6 causes a time shift of the time interval t2-t3 to the left in Figs. 10a to 10c,

The circuit of Figure 9 and the waveforms of Figure 10 show the operation of a television receiver with a 110 degree S4 color picture tube operating at an acceleration voltage of 24 kilovolts.

Claims (13)

An energy supply and modulated deflection circuit comprising; a deflection winding, switching means 5 coupled to the deflection winding and driven at a deflection rate to generate scanning current in the deflection winding during a scanning time of a deflection cycle, the deflection cycle, a source of supply energy, and a source of supply inductance (W1), and an impedance (L1) coupled to a source (24) of the modulating current, and of the deflection return resonant circuit, characterized by a second capacitance (CRT) coupled to the supply inductance (W1) and to the switching means (Q1) to form a second resonant circuit (30) with the supply inductance (W1) within the iterating time to generate a pulse voltage, and thereby switching on said impedance (Li) during the return time in a current path between the deflection return circuit and the other re sonon circuit in a way that maintains a significant difference between them. 2. A circuit as claimed in claim 1, characterized in that the impedance comprises a modulation inductance (LI) having a relatively high value at high frequencies, such as the deflection return frequency. 3. A circuit according to claim 2, characterized in that a resonant frequency of the second resonant circuit (30) is at or near the deflection repeat frequency. The circuit of claim 2, which includes a line capacitor coupled to the deflection winding to supply the scan voltage at the same, while the amplitude of the scan current varies as the scan voltage varies, characterized in that the impedance (Li) switches modulation current 22 ) to the deflection return resonant circuit (25) to vary scan voltage as the modulation current varies. The circuit according to claim 1 or 2, wherein the deflection circuit is a horizontal deflection circuit, characterized by a source (43) for image rate signals coupled to the source (Q2) of modulation current to vary the modulation current in a sub-frame. rate to achieve a west-west cushion-corrected scan stream path shape. 6. A circuit according to claim 1 or 2, characterized in that the impedance (T2) comprises a first winding (Wa) connected to the source (W3 ') for modulating current, and a second winding (Wb) which is magnetically coupled. to the first winding and which is coupled between the deflection recirculation circuit and the second resonant circuit during the deflection recirculation time. 7. A circuit according to claim 1, characterized in that the source of the modulation current comprises a voltage source (81) coupled to the first winding (Wa) of the impedance (T2) and to a first controllable switch (Q2). controllable switches respond to a control signal for pulse modulation of its switching. 8. A circuit according to claim 7, characterized by a rectifier (D4) coupled to the second winding (Wb) of the impedance (T2) to provide a reverse conversion operation of the adjustable switch (Q2). The circuit according to claim 8, wherein the deflection circuit and the deflection winding are a horizontal deflection circuit and a deflection circuit, respectively. a horizontal deflection winding, characterized by means (Q3) for generating an image rate signal and means (UlA) coupled to the first adjustable switch (Q2) responsive to the image rate signal for generating the control signal as well as a control pulse modulated in an image rate and which are II