FI57189C - Antivalenskontrollanordning foer en tvaokanals kopplingsanlaeggning - Google Patents
Antivalenskontrollanordning foer en tvaokanals kopplingsanlaeggning Download PDFInfo
- Publication number
- FI57189C FI57189C FI2854/73A FI285473A FI57189C FI 57189 C FI57189 C FI 57189C FI 2854/73 A FI2854/73 A FI 2854/73A FI 285473 A FI285473 A FI 285473A FI 57189 C FI57189 C FI 57189C
- Authority
- FI
- Finland
- Prior art keywords
- monitoring
- valence
- transformer
- elements
- transistor
- Prior art date
Links
- 238000012544 monitoring process Methods 0.000 claims description 32
- 238000012806 monitoring device Methods 0.000 claims description 10
- 239000004606 Fillers/Extenders Substances 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000004513 sizing Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 7
- 238000004804 winding Methods 0.000 description 7
- 230000010355 oscillation Effects 0.000 description 5
- 230000001960 triggered effect Effects 0.000 description 3
- 230000000692 anti-sense effect Effects 0.000 description 1
- 230000006399 behavior Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
- H03K19/212—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using bipolar transistors
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
- Remote Monitoring And Control Of Power-Distribution Networks (AREA)
- Keying Circuit Devices (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2247276 | 1972-09-27 | ||
| DE2247276A DE2247276C3 (de) | 1972-09-27 | 1972-09-27 | Antivalenzkontrolleinrichtung für ein zweikanaliges Schaltwerk |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FI57189B FI57189B (fi) | 1980-02-29 |
| FI57189C true FI57189C (fi) | 1980-06-10 |
Family
ID=5857466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FI2854/73A FI57189C (fi) | 1972-09-27 | 1973-09-13 | Antivalenskontrollanordning foer en tvaokanals kopplingsanlaeggning |
Country Status (6)
| Country | Link |
|---|---|
| AT (1) | AT329636B (de) |
| BE (1) | BE805158A (de) |
| CH (1) | CH559989A5 (de) |
| DE (1) | DE2247276C3 (de) |
| FI (1) | FI57189C (de) |
| ZA (1) | ZA737333B (de) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2717248C2 (de) * | 1971-09-22 | 1984-05-10 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Schaltungsanordnung zur Überwachung von binären Signalen auf Antivalenz |
| CH594322A5 (de) * | 1975-05-21 | 1978-01-13 | Inventio Ag | |
| DE2651314C2 (de) * | 1976-11-10 | 1982-03-25 | Siemens AG, 1000 Berlin und 8000 München | Sicherheits-Ausgabeschaltung für eine Binärsignale abgebende Datenverarbeitungsanlage |
| DE3519252A1 (de) * | 1985-05-29 | 1986-12-04 | Fresenius AG, 6380 Bad Homburg | Fehlersichere logikschaltung |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE1537379C3 (de) * | 1967-09-22 | 1980-07-03 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Sicherheitsschaltung zum Durchführen logischer Verknüpfungen für binäre Schaltvariable und deren antivalente Schaltvariable |
| DE1960590A1 (de) * | 1969-12-03 | 1971-06-24 | Pintsch Bamag Ag | Schaltung zur UEberwachung von Signalanlagen |
-
1972
- 1972-09-27 DE DE2247276A patent/DE2247276C3/de not_active Expired
-
1973
- 1973-08-31 CH CH1243573A patent/CH559989A5/xx not_active IP Right Cessation
- 1973-09-13 FI FI2854/73A patent/FI57189C/fi active
- 1973-09-14 AT AT797873A patent/AT329636B/de not_active IP Right Cessation
- 1973-09-14 ZA ZA737333*A patent/ZA737333B/xx unknown
- 1973-09-21 BE BE135906A patent/BE805158A/xx not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| DE2247276B2 (de) | 1976-12-16 |
| ATA797873A (de) | 1975-08-15 |
| DE2247276A1 (de) | 1974-03-28 |
| DE2247276C3 (de) | 1981-06-11 |
| BE805158A (fr) | 1974-01-16 |
| AT329636B (de) | 1976-05-25 |
| ZA737333B (en) | 1974-08-28 |
| FI57189B (fi) | 1980-02-29 |
| CH559989A5 (de) | 1975-03-14 |
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