FI113817B - Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät - Google Patents

Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät

Info

Publication number
FI113817B
FI113817B FI20020988A FI20020988A FI113817B FI 113817 B FI113817 B FI 113817B FI 20020988 A FI20020988 A FI 20020988A FI 20020988 A FI20020988 A FI 20020988A FI 113817 B FI113817 B FI 113817B
Authority
FI
Finland
Prior art keywords
phase lock
cellular network
network terminal
integrated circuit
circuit arrangement
Prior art date
Application number
FI20020988A
Other languages
English (en)
Finnish (fi)
Other versions
FI20020988A (sv
FI20020988A0 (sv
Inventor
Markus Suhonen
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Priority to FI20020988A priority Critical patent/FI113817B/sv
Publication of FI20020988A0 publication Critical patent/FI20020988A0/sv
Priority to US10/429,493 priority patent/US7283801B2/en
Publication of FI20020988A publication Critical patent/FI20020988A/sv
Application granted granted Critical
Publication of FI113817B publication Critical patent/FI113817B/sv

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/105—Resetting the controlled oscillator when its frequency is outside a predetermined limit
FI20020988A 2002-05-27 2002-05-27 Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät FI113817B (sv)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FI20020988A FI113817B (sv) 2002-05-27 2002-05-27 Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät
US10/429,493 US7283801B2 (en) 2002-05-27 2003-05-05 Circuit arrangement for phase locked loop, and phase locked loop based method to be used in cellular network terminals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20020988A FI113817B (sv) 2002-05-27 2002-05-27 Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät

Publications (3)

Publication Number Publication Date
FI20020988A0 FI20020988A0 (sv) 2002-05-27
FI20020988A FI20020988A (sv) 2003-11-28
FI113817B true FI113817B (sv) 2004-06-15

Family

ID=8564007

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20020988A FI113817B (sv) 2002-05-27 2002-05-27 Förbättrat kretsarrangemang för ett faslås, integrerad krets med ett faslås, förfarande som utnyttjar ett faslås och terminal i ett cellulärt nät

Country Status (2)

Country Link
US (1) US7283801B2 (sv)
FI (1) FI113817B (sv)

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KR100653199B1 (ko) * 2005-11-18 2006-12-05 삼성전자주식회사 로컬 신호를 이용하여 수신 신호에서 리키지 성분을제거하는 ｒｆ 수신 장치 및 방법
US20080063129A1 (en) * 2006-09-11 2008-03-13 Nokia Corporation System and method for pre-defined wake-up of high speed serial link
ES2395358B1 (es) 2011-02-08 2014-04-25 Tyco Electronics Corporation Conectador de acción única
ES2402632B1 (es) 2011-02-08 2014-05-14 Tyco Electronics Raychem Bvba Lengüeta de liberación para un conectador eléctrico y conectador eléctrico que comprende dicha lengüeta de liberación
US20120229307A1 (en) * 2011-03-10 2012-09-13 Chun-Liang Tsai Low power wireless short range transmission system
CN103257407B (zh) 2012-02-20 2015-11-25 泰科电子(上海)有限公司 连接器和连接器组件
MX2016009140A (es) 2014-01-13 2016-10-28 Tyco Electronics Shanghai Co Ltd Conector de fibra optica.
US11215767B2 (en) 2017-06-07 2022-01-04 Commscope Technologies Llc Fiber optic adapter and cassette

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US5842029A (en) * 1991-10-17 1998-11-24 Intel Corporation Method and apparatus for powering down an integrated circuit transparently and its phase locked loop
JPH05304467A (ja) 1992-04-24 1993-11-16 Ricoh Co Ltd 発振回路
JPH0613898A (ja) * 1992-06-29 1994-01-21 Nec Corp 周波数シンセサイザ
EP0688446A1 (en) * 1993-03-10 1995-12-27 National Semiconductor Corporation Radio frequency telecommunications transceiver
JP2895342B2 (ja) * 1993-03-26 1999-05-24 三菱電機株式会社 移動無線機
US5523724A (en) * 1994-08-19 1996-06-04 Cirrus Logic, Inc. Fast recovering charge pump for controlling a VCO in a low power clocking circuit
JPH0879074A (ja) * 1994-09-05 1996-03-22 Mitsubishi Electric Corp フェーズ・ロックド・ループ回路
US5748103A (en) * 1995-11-13 1998-05-05 Vitalcom, Inc. Two-way TDMA telemetry system with power conservation features
US5714912A (en) * 1996-08-22 1998-02-03 Lsi Logic Corporation VCO supply voltage regulator
US6009319A (en) * 1996-09-06 1999-12-28 Telefonaktiebolaget Lm Ericsson Method and apparatus for reducing power consumption in a mobile radio communication device
JP3839117B2 (ja) * 1997-01-30 2006-11-01 株式会社ルネサステクノロジ Ｐｌｌ回路およびそれを用いた無線通信端末機器
US6788924B1 (en) * 1997-12-12 2004-09-07 Thomson Licensing S.A. Power saving protocol for TDMA multi-line wireless telephone handsets
FR2787259B1 (fr) * 1998-06-05 2004-07-09 Siemens Ag Boucle a verrouillage de phase pour des signaux a haute frequence
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JP2000286703A (ja) * 1999-03-30 2000-10-13 Fujitsu Ltd リセット回路及びｐｌｌ周波数シンセサイザ
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EP1290796A1 (en) * 2000-05-10 2003-03-12 Cellon France SAS A frequency synthesizer having a phase-locked loop with circuit for reducing power-on switching transients
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DE60041546D1 (de) * 2000-12-28 2009-03-26 Renesas Tech Corp PLL-Schaltung mit reduzierter Einschwingzeit
JP4138264B2 (ja) * 2001-03-16 2008-08-27 富士通株式会社 Ｐｌｌ周波数シンセサイザ
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FI20010760A0 (sv) * 2001-04-11 2001-04-11 Nokia Corp Förfarande för mottagning av en signal av radiofrekvens (RF) och RF-mottagare
FI114886B (sv) * 2001-06-29 2005-01-14 Nokia Corp Förfarande och anordning för förbättring av en frekvenssyntetisators effektivitet
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US7151915B2 (en) * 2001-09-26 2006-12-19 Nokia Corporation Dual mode voltage controlled oscillator having controllable bias modes and power consumption
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Also Published As

Publication number Publication date
US7283801B2 (en) 2007-10-16
FI20020988A (sv) 2003-11-28
FI20020988A0 (sv) 2002-05-27
US20030220087A1 (en) 2003-11-27

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