FI107207B - Menetelmä, järjestelmä ja laite viallisen yksikön tunnistamiseksi - Google Patents
Menetelmä, järjestelmä ja laite viallisen yksikön tunnistamiseksi Download PDFInfo
- Publication number
- FI107207B FI107207B FI990966A FI990966A FI107207B FI 107207 B FI107207 B FI 107207B FI 990966 A FI990966 A FI 990966A FI 990966 A FI990966 A FI 990966A FI 107207 B FI107207 B FI 107207B
- Authority
- FI
- Finland
- Prior art keywords
- bus
- register
- plug
- unit
- address
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FI990966A FI107207B (fi) | 1999-04-28 | 1999-04-28 | Menetelmä, järjestelmä ja laite viallisen yksikön tunnistamiseksi |
| AU38227/00A AU3822700A (en) | 1999-04-28 | 2000-04-06 | Method, system and device for identifying a defective unit |
| PCT/FI2000/000293 WO2000067127A1 (en) | 1999-04-28 | 2000-04-06 | Method, system and device for identifying a defective unit |
| EP00660075A EP1049015A3 (de) | 1999-04-28 | 2000-04-25 | Verfahren, System und Gerät um eine fehlerhafte Einsteckeinheit zu erkennen |
| US10/010,905 US20020099981A1 (en) | 1999-04-28 | 2001-10-18 | Method, system and device for identifying a defective unit |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FI990966 | 1999-04-28 | ||
| FI990966A FI107207B (fi) | 1999-04-28 | 1999-04-28 | Menetelmä, järjestelmä ja laite viallisen yksikön tunnistamiseksi |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| FI990966A0 FI990966A0 (fi) | 1999-04-28 |
| FI990966L FI990966L (fi) | 2000-10-29 |
| FI107207B true FI107207B (fi) | 2001-06-15 |
Family
ID=8554545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FI990966A FI107207B (fi) | 1999-04-28 | 1999-04-28 | Menetelmä, järjestelmä ja laite viallisen yksikön tunnistamiseksi |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20020099981A1 (de) |
| EP (1) | EP1049015A3 (de) |
| AU (1) | AU3822700A (de) |
| FI (1) | FI107207B (de) |
| WO (1) | WO2000067127A1 (de) |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3332601A1 (de) * | 1983-09-09 | 1985-03-28 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum registrieren von adressen von einen fehlerhaften speicherinhalt aufweisenden speicherzellen |
| US4918693A (en) * | 1988-01-28 | 1990-04-17 | Prime Computer, Inc. | Apparatus for physically locating faulty electrical components |
| JPH0746322B2 (ja) * | 1988-05-23 | 1995-05-17 | 日本電気株式会社 | 障害装置特定システム |
| US4951283A (en) * | 1988-07-08 | 1990-08-21 | Genrad, Inc. | Method and apparatus for identifying defective bus devices |
| US5119379A (en) * | 1990-02-26 | 1992-06-02 | Seiscor Technologies Inc. | Method and apparatus for fault reporting |
| US5345583A (en) * | 1992-05-13 | 1994-09-06 | Scientific-Atlanta, Inc. | Method and apparatus for momentarily interrupting power to a microprocessor to clear a fault state |
| US5390324A (en) * | 1992-10-02 | 1995-02-14 | Compaq Computer Corporation | Computer failure recovery and alert system |
| US5428766A (en) * | 1992-12-01 | 1995-06-27 | Digital Equipment Corporation | Error detection scheme in a multiprocessor environment |
| KR100244836B1 (ko) * | 1995-11-02 | 2000-02-15 | 포만 제프리 엘 | 컴퓨터시스템 및 다수의 기능카드 중 한개의 기능카드를 격리하는 방법 |
| US6075929A (en) * | 1996-06-05 | 2000-06-13 | Compaq Computer Corporation | Prefetching data in response to a read transaction for which the requesting device relinquishes control of the data bus while awaiting data requested in the transaction |
| US6032271A (en) * | 1996-06-05 | 2000-02-29 | Compaq Computer Corporation | Method and apparatus for identifying faulty devices in a computer system |
| US5978938A (en) * | 1996-11-19 | 1999-11-02 | International Business Machines Corporation | Fault isolation feature for an I/O or system bus |
| US5954825A (en) * | 1997-04-11 | 1999-09-21 | International Business Machines Corporation | Method for isolating faults on a clocked synchronous bus |
| US5878237A (en) * | 1997-07-11 | 1999-03-02 | Compaq Computer Corp. | Apparatus, method and system for a comuter CPU and memory to PCI bridge having a pluarlity of physical PCI buses |
| US6496945B2 (en) * | 1998-06-04 | 2002-12-17 | Compaq Information Technologies Group, L.P. | Computer system implementing fault detection and isolation using unique identification codes stored in non-volatile memory |
| DE69831332T2 (de) * | 1998-10-15 | 2006-08-03 | Hewlett-Packard Development Co., L.P., Houston | Lokales Bus und/oder-Schnittstellenerfassungsmodul für einen Diagnoseanalysator |
| US6311296B1 (en) * | 1998-12-29 | 2001-10-30 | Intel Corporation | Bus management card for use in a system for bus monitoring |
| US6523140B1 (en) * | 1999-10-07 | 2003-02-18 | International Business Machines Corporation | Computer system error recovery and fault isolation |
| JP3711871B2 (ja) * | 2001-01-23 | 2005-11-02 | 日本電気株式会社 | Pciバスの障害解析容易化方式 |
-
1999
- 1999-04-28 FI FI990966A patent/FI107207B/fi active
-
2000
- 2000-04-06 WO PCT/FI2000/000293 patent/WO2000067127A1/en not_active Ceased
- 2000-04-06 AU AU38227/00A patent/AU3822700A/en not_active Abandoned
- 2000-04-25 EP EP00660075A patent/EP1049015A3/de not_active Withdrawn
-
2001
- 2001-10-18 US US10/010,905 patent/US20020099981A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| AU3822700A (en) | 2000-11-17 |
| WO2000067127A1 (en) | 2000-11-09 |
| EP1049015A3 (de) | 2005-08-31 |
| US20020099981A1 (en) | 2002-07-25 |
| EP1049015A2 (de) | 2000-11-02 |
| FI990966A0 (fi) | 1999-04-28 |
| FI990966L (fi) | 2000-10-29 |
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