Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co LtdfiledCriticalTokyo Shibaura Electric Co Ltd
Priority to ES495518ApriorityCriticalpatent/ES495518A0/en
Publication of ES8201358A1publicationCriticalpatent/ES8201358A1/en
Publication of ES495518A0publicationCriticalpatent/ES495518A0/en
Semiconductor device. On a substrate (31) of aluminum or copper a pulverized insulating layer (32) of a ceramic material is deposited. A pulverized metal coat (33) based on nickel, tin or silver is formed on this. Below a weld layer (34) is provided which is used to join the semiconductor element (35) situated in the last place. Thickness of spray and metallic layers sprayed varian between 0.05 and 0.4 mm. As an alternative, the device can be constructed without an insulating layer. (Machine-translation by Google Translate, not legally binding)
ES495518A1980-09-301980-09-30
A SEMICONDUCTIVE DEVICE
GrantedES495518A0
(en)
Method of manufacturing an integrated circuit, by selective corrosión of a coated substrate of multiple layers of perfected film. (Machine-translation by Google Translate, not legally binding)