ES513051A0 - Metodo de formar orificios de paso a traves de un recubrimiento aislante dielectrico. - Google Patents

Metodo de formar orificios de paso a traves de un recubrimiento aislante dielectrico.

Info

Publication number
ES513051A0
ES513051A0 ES513051A ES513051A ES513051A0 ES 513051 A0 ES513051 A0 ES 513051A0 ES 513051 A ES513051 A ES 513051A ES 513051 A ES513051 A ES 513051A ES 513051 A0 ES513051 A0 ES 513051A0
Authority
ES
Spain
Prior art keywords
insulation coating
passage holes
dielectric insulation
forming passage
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES513051A
Other languages
English (en)
Other versions
ES8308155A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES513051A0 publication Critical patent/ES513051A0/es
Publication of ES8308155A1 publication Critical patent/ES8308155A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/094—Multilayer resist systems, e.g. planarising layers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/30—Imagewise removal using liquid means

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electron Beam Exposure (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
ES513051A 1981-07-15 1982-06-14 Metodo de formar orificios de paso a traves de un recubrimiento aislante dielectrico. Expired ES8308155A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/283,695 US4409319A (en) 1981-07-15 1981-07-15 Electron beam exposed positive resist mask process

Publications (2)

Publication Number Publication Date
ES513051A0 true ES513051A0 (es) 1983-08-01
ES8308155A1 ES8308155A1 (es) 1983-08-01

Family

ID=23087160

Family Applications (1)

Application Number Title Priority Date Filing Date
ES513051A Expired ES8308155A1 (es) 1981-07-15 1982-06-14 Metodo de formar orificios de paso a traves de un recubrimiento aislante dielectrico.

Country Status (6)

Country Link
US (1) US4409319A (es)
EP (1) EP0069854B1 (es)
JP (1) JPS5844720A (es)
CA (1) CA1173689A (es)
DE (1) DE3267000D1 (es)
ES (1) ES8308155A1 (es)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2137808A (en) * 1983-04-06 1984-10-10 Plessey Co Plc Integrated circuit processing method
US4474864A (en) * 1983-07-08 1984-10-02 International Business Machines Corporation Method for dose calculation of photolithography projection printers through bleaching of photo-active compound in a photoresist
JPS60114575A (ja) * 1983-11-28 1985-06-21 Tokyo Ohka Kogyo Co Ltd 乾式パタ−ン形成方法
US4560436A (en) * 1984-07-02 1985-12-24 Motorola, Inc. Process for etching tapered polyimide vias
JPS6148883A (ja) * 1984-08-16 1986-03-10 Toppan Printing Co Ltd フオトレジストを用いたレインボウホログラムの製造方法
US4592132A (en) * 1984-12-07 1986-06-03 Hughes Aircraft Company Process for fabricating multi-level-metal integrated circuits at high yields
JP2517707B2 (ja) * 1985-03-04 1996-07-24 ソニー株式会社 フオトレジストパタ−ンの形成方法
US4671849A (en) * 1985-05-06 1987-06-09 International Business Machines Corporation Method for control of etch profile
US4827867A (en) * 1985-11-28 1989-05-09 Daikin Industries, Ltd. Resist developing apparatus
US4762805A (en) * 1985-12-17 1988-08-09 Advanced Micro Devices, Inc. Nitride-less process for VLSI circuit device isolation
US4863827A (en) * 1986-10-20 1989-09-05 American Hoechst Corporation Postive working multi-level photoresist
US4822755A (en) * 1988-04-25 1989-04-18 Xerox Corporation Method of fabricating large area semiconductor arrays
US5225771A (en) * 1988-05-16 1993-07-06 Dri Technology Corp. Making and testing an integrated circuit using high density probe points
US6288561B1 (en) * 1988-05-16 2001-09-11 Elm Technology Corporation Method and apparatus for probing, testing, burn-in, repairing and programming of integrated circuits in a closed environment using a single apparatus
US5103557A (en) * 1988-05-16 1992-04-14 Leedy Glenn J Making and testing an integrated circuit using high density probe points
US5068959A (en) * 1988-07-11 1991-12-03 Digital Equipment Corporation Method of manufacturing a thin film head
JP2542075B2 (ja) * 1989-02-23 1996-10-09 三菱電機株式会社 シリコ―ンラダ―系樹脂にパタ―ンを転写する方法およびそれに用いるエッチング液
US5483104A (en) * 1990-01-12 1996-01-09 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
US5166771A (en) * 1990-01-12 1992-11-24 Paradigm Technology, Inc. Self-aligning contact and interconnect structure
US5174857A (en) * 1990-10-29 1992-12-29 Gold Star Co., Ltd. Slope etching process
US5296333A (en) * 1990-11-16 1994-03-22 Raytheon Company Photoresist adhesion promoter
US5935734A (en) * 1997-03-03 1999-08-10 Micron Technology, Inc. Method for fabrication of and apparatus for use as a semiconductor photomask
JPH11289103A (ja) * 1998-02-05 1999-10-19 Canon Inc 半導体装置および太陽電池モジュ―ル及びその解体方法
US6606533B1 (en) 2000-10-12 2003-08-12 International Business Machines Corporation Method and arrangement for controlling image size of integrated circuits on wafers through post-exposure bake hotplate-specific dose feedback
AUPR451601A0 (en) * 2001-04-20 2001-05-24 Fawcett, Alan John Method and apparatus for the hardening of photopolymer plates
JP2002353195A (ja) * 2001-05-23 2002-12-06 Sony Corp 半導体装置の製造方法
EP1273973A1 (en) * 2001-07-03 2003-01-08 Infineon Technologies SC300 GmbH & Co. KG Method for adjusting a temperature in a resist process
JP4876341B2 (ja) * 2001-07-13 2012-02-15 日本電気株式会社 アクティブマトリクス基板及びその製造方法
GB2387026A (en) * 2002-03-28 2003-10-01 Zarlink Semiconductor Ltd Method of coating contact holes in MEMS and micro-machining applications
JP2005196130A (ja) * 2003-12-12 2005-07-21 Hitachi Cable Ltd 感光性ポリイミド樹脂組成物、それを用いた絶縁膜、絶縁膜の製造方法および絶縁膜を使用した電子部品
CN100370580C (zh) * 2004-03-29 2008-02-20 雅马哈株式会社 半导体晶片及其制造方法
DE102004052611A1 (de) * 2004-10-29 2006-05-04 Infineon Technologies Ag Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle
US7973413B2 (en) * 2007-08-24 2011-07-05 Taiwan Semiconductor Manufacturing Company, Ltd. Through-substrate via for semiconductor device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3549368A (en) * 1968-07-02 1970-12-22 Ibm Process for improving photoresist adhesion
US3751248A (en) * 1971-12-27 1973-08-07 Bell Telephone Labor Inc Method of selective multilayered etching
US3852771A (en) * 1973-02-12 1974-12-03 Rca Corp Electron beam recording process
JPS49116976A (es) * 1973-03-09 1974-11-08
US3961101A (en) * 1974-09-16 1976-06-01 Rca Corporation Process for improved development of electron-beam-sensitive resist films
DE2447225C2 (de) * 1974-10-03 1983-12-22 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren zum Ablösen von positiven Photolack
JPS5261482A (en) * 1975-11-17 1977-05-20 Mitsubishi Electric Corp Photo etching
JPS6026294B2 (ja) * 1977-09-26 1985-06-22 株式会社日立製作所 フオトエツチング方法
US4212935A (en) * 1978-02-24 1980-07-15 International Business Machines Corporation Method of modifying the development profile of photoresists
US4184909A (en) * 1978-08-21 1980-01-22 International Business Machines Corporation Method of forming thin film interconnection systems
JPS5626434A (en) * 1979-08-10 1981-03-14 Oki Electric Ind Co Ltd Forming method for pattern of semiconductor substrate

Also Published As

Publication number Publication date
JPS6357941B2 (es) 1988-11-14
DE3267000D1 (en) 1985-11-28
EP0069854A3 (en) 1983-06-22
JPS5844720A (ja) 1983-03-15
CA1173689A (en) 1984-09-04
EP0069854B1 (en) 1985-10-23
US4409319A (en) 1983-10-11
EP0069854A2 (en) 1983-01-19
ES8308155A1 (es) 1983-08-01

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