ES419172A1 - Data processing system - Google Patents
Data processing systemInfo
- Publication number
- ES419172A1 ES419172A1 ES419172A ES419172A ES419172A1 ES 419172 A1 ES419172 A1 ES 419172A1 ES 419172 A ES419172 A ES 419172A ES 419172 A ES419172 A ES 419172A ES 419172 A1 ES419172 A1 ES 419172A1
- Authority
- ES
- Spain
- Prior art keywords
- address
- registers
- data processing
- processing system
- control words
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4825—Interrupt from clock, e.g. time of day
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Programmable Controllers (AREA)
- Multi Processors (AREA)
- Digital Computer Display Output (AREA)
Abstract
Circuit arrangement in a data processing system to allocate processing time to various tasks, in particular to several simultaneously executed programs, by selecting control words that are assigned to the tasks, characterized by registers for control words consisting of an indication part and an address part that can be addressed by orientation addresses, and by address circuits to receive the address part from any one of the registers and to provide a following orientation address in order to select one of the registers. (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19722247735 DE2247735C3 (en) | 1972-09-29 | Circuit arrangement for the dynamic allocation of computing time |
Publications (1)
Publication Number | Publication Date |
---|---|
ES419172A1 true ES419172A1 (en) | 1976-04-16 |
Family
ID=5857708
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES419172A Expired ES419172A1 (en) | 1972-09-29 | 1973-09-28 | Data processing system |
Country Status (8)
Country | Link |
---|---|
JP (1) | JPS5746094B2 (en) |
CH (1) | CH556062A (en) |
ES (1) | ES419172A1 (en) |
FR (1) | FR2201782A5 (en) |
GB (1) | GB1441661A (en) |
IT (1) | IT993602B (en) |
NL (1) | NL7313230A (en) |
SE (1) | SE387453B (en) |
-
1973
- 1973-07-20 IT IT2682573A patent/IT993602B/en active
- 1973-07-30 FR FR7328904A patent/FR2201782A5/fr not_active Expired
- 1973-08-21 JP JP48092990A patent/JPS5746094B2/ja not_active Expired
- 1973-08-28 CH CH1228173A patent/CH556062A/en not_active IP Right Cessation
- 1973-08-30 GB GB4077573A patent/GB1441661A/en not_active Expired
- 1973-09-05 SE SE7312055A patent/SE387453B/en unknown
- 1973-09-26 NL NL7313230A patent/NL7313230A/xx active Search and Examination
- 1973-09-28 ES ES419172A patent/ES419172A1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
NL7313230A (en) | 1974-04-02 |
FR2201782A5 (en) | 1974-04-26 |
IT993602B (en) | 1975-09-30 |
DE2247735A1 (en) | 1974-04-18 |
JPS5746094B2 (en) | 1982-10-01 |
GB1441661A (en) | 1976-07-07 |
CH556062A (en) | 1974-11-15 |
SE387453B (en) | 1976-09-06 |
JPS4973047A (en) | 1974-07-15 |
DE2247735B2 (en) | 1975-06-12 |
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