CA924017A - Circuit design by an automated data processing machine - Google Patents

Circuit design by an automated data processing machine

Info

Publication number
CA924017A
CA924017A CA085249A CA85249A CA924017A CA 924017 A CA924017 A CA 924017A CA 085249 A CA085249 A CA 085249A CA 85249 A CA85249 A CA 85249A CA 924017 A CA924017 A CA 924017A
Authority
CA
Canada
Prior art keywords
data processing
processing machine
circuit design
automated data
automated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA085249A
Inventor
W. Dyer Lester
J. Policky Gary
W. Houston Theodore
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of CA924017A publication Critical patent/CA924017A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/36—Circuit design at the analogue level
    • G—PHYSICS
    • G04—HOROLOGY
    • G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C19/00—Producing optical time signals at prefixed times by electric means
    • G04C19/04—Producing optical time signals at prefixed times by electric means by indicating members moved electrically, e.g. flap, band

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
CA085249A 1969-06-11 1970-06-11 Circuit design by an automated data processing machine Expired CA924017A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US83389269A 1969-06-11 1969-06-11

Publications (1)

Publication Number Publication Date
CA924017A true CA924017A (en) 1973-04-03

Family

ID=25265545

Family Applications (1)

Application Number Title Priority Date Filing Date
CA085249A Expired CA924017A (en) 1969-06-11 1970-06-11 Circuit design by an automated data processing machine

Country Status (3)

Country Link
US (1) US3622762A (en)
CA (1) CA924017A (en)
GB (1) GB1322400A (en)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4447881A (en) * 1980-05-29 1984-05-08 Texas Instruments Incorporated Data processing system integrated circuit having modular memory add-on capacity
US4495559A (en) * 1981-11-02 1985-01-22 International Business Machines Corporation Optimization of an organization of many discrete elements
US4613940A (en) * 1982-11-09 1986-09-23 International Microelectronic Products Method and structure for use in designing and building electronic systems in integrated circuits
US4580228A (en) * 1983-06-06 1986-04-01 The United States Of America As Represented By The Secretary Of The Army Automated design program for LSI and VLSI circuits
US4628471A (en) * 1984-02-02 1986-12-09 Prime Computer, Inc. Digital system simulation method and apparatus having two signal-level modes of operation
US4635208A (en) * 1985-01-18 1987-01-06 Hewlett-Packard Company Computer-aided design of systems
US5257201A (en) * 1987-03-20 1993-10-26 International Business Machines Corporation Method to efficiently reduce the number of connections in a circuit
US5047971A (en) * 1987-06-23 1991-09-10 Intergraph Corporation Circuit simulation
US4916627A (en) * 1987-12-02 1990-04-10 International Business Machines Corporation Logic path length reduction using boolean minimization
US4989132A (en) * 1988-10-24 1991-01-29 Eastman Kodak Company Object-oriented, logic, and database programming tool with garbage collection
JPH02189477A (en) * 1989-01-19 1990-07-25 Mitsubishi Electric Corp Preparation of measurement specification for electronic circuit
US5282148A (en) * 1989-05-23 1994-01-25 Vlsi Technology, Inc. Method and apparatus for the design and fabrication of integrated circuits employing logic decomposition algorithms for the timing optimization of multilevel logic
US5113352A (en) * 1989-06-20 1992-05-12 Digital Equipment Corporation Integrating the logical and physical design of electronically linked objects
DE69032640D1 (en) * 1989-09-05 1998-10-15 Lsi Logic Corp Logic compiler for designing circuit models
US5497337A (en) * 1994-10-21 1996-03-05 International Business Machines Corporation Method for designing high-Q inductors in silicon technology without expensive metalization
US6282693B1 (en) * 1998-12-16 2001-08-28 Synopsys, Inc. Non-linear optimization system and method for wire length and density within an automatic electronic circuit placer
US6301693B1 (en) * 1998-12-16 2001-10-09 Synopsys, Inc. Non-linear optimization system and method for wire length and delay optimization for an automatic electric circuit placer
US7131097B1 (en) * 2002-09-24 2006-10-31 Altera Corporation Logic generation for multiple memory functions
US7260562B2 (en) * 2003-06-30 2007-08-21 Intel Corporation Solutions for constraint satisfaction problems requiring multiple constraints
US20050278659A1 (en) * 2004-05-27 2005-12-15 Xiaonan Zhang Cell library providing transistor size information for automatic circuit design
US7254802B2 (en) * 2004-05-27 2007-08-07 Verisilicon Holdings, Co. Ltd. Standard cell library having cell drive strengths selected according to delay
US7426710B2 (en) * 2004-05-27 2008-09-16 Verisilicon Holdings, Co. Ltd. Standard cell library having cell drive strengths selected according to delay
US7114134B2 (en) * 2004-05-27 2006-09-26 Veri Silicon Holdings, Co. Ltd Automatic circuit design method with a cell library providing transistor size information
TWI529551B (en) * 2009-09-10 2016-04-11 卡登斯系統設計公司 Method and system for implementing graphically editable parameterized cells

Also Published As

Publication number Publication date
GB1322400A (en) 1973-07-04
US3622762A (en) 1971-11-23

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