ES392536A1 - Un procedimiento para formar contactos ohmicos sobre una superficie de un dispositivo semiconductor. - Google Patents

Un procedimiento para formar contactos ohmicos sobre una superficie de un dispositivo semiconductor.

Info

Publication number
ES392536A1
ES392536A1 ES392536A ES392536A ES392536A1 ES 392536 A1 ES392536 A1 ES 392536A1 ES 392536 A ES392536 A ES 392536A ES 392536 A ES392536 A ES 392536A ES 392536 A1 ES392536 A1 ES 392536A1
Authority
ES
Spain
Prior art keywords
metal
ohmic contacts
forming ohmic
field effect
effect transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES392536A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of ES392536A1 publication Critical patent/ES392536A1/es
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
ES392536A 1970-06-29 1971-06-22 Un procedimiento para formar contactos ohmicos sobre una superficie de un dispositivo semiconductor. Expired ES392536A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5050670A 1970-06-29 1970-06-29

Publications (1)

Publication Number Publication Date
ES392536A1 true ES392536A1 (es) 1973-10-01

Family

ID=21965622

Family Applications (2)

Application Number Title Priority Date Filing Date
ES392536A Expired ES392536A1 (es) 1970-06-29 1971-06-22 Un procedimiento para formar contactos ohmicos sobre una superficie de un dispositivo semiconductor.
ES396549A Expired ES396549A1 (es) 1970-06-29 1971-10-30 Un procedimiento para formar conductores de haz sobre una superficie de un dispositivo semiconductor de metal y aisla-dor.

Family Applications After (1)

Application Number Title Priority Date Filing Date
ES396549A Expired ES396549A1 (es) 1970-06-29 1971-10-30 Un procedimiento para formar conductores de haz sobre una superficie de un dispositivo semiconductor de metal y aisla-dor.

Country Status (9)

Country Link
JP (1) JPS516502B1 (es)
BE (1) BE769169A (es)
CH (1) CH540568A (es)
DE (1) DE2128360A1 (es)
ES (2) ES392536A1 (es)
FR (1) FR2096553B1 (es)
GB (1) GB1307667A (es)
NL (1) NL7108904A (es)
SE (1) SE370144B (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5371802U (es) * 1976-11-17 1978-06-15
DE3011660A1 (de) * 1980-03-26 1981-10-01 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Mehrschichtiger ohmscher anschlusskontakt
DE19828846C2 (de) * 1998-06-27 2001-01-18 Micronas Gmbh Verfahren zum Beschichten eines Substrats

Also Published As

Publication number Publication date
SE370144B (es) 1974-09-30
ES396549A1 (es) 1974-04-16
CH540568A (de) 1973-08-15
BE769169A (fr) 1971-11-03
FR2096553B1 (es) 1976-09-03
JPS516502B1 (es) 1976-02-28
FR2096553A1 (es) 1972-02-18
GB1307667A (en) 1973-02-21
DE2128360A1 (de) 1972-01-13
NL7108904A (es) 1971-12-31

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