ES373627A1 - Semiconductor devices - Google Patents

Abstract

In a semi-conductor resistor comprising a body containing electrically active impurities to provide free charge carriers and electrically inactive impurities to reduce the temperature coefficient, the inactive impurities consist for a substantial part of neutral impurities. The neutral impurities may be elements such as Pb or Sn in Si, Ge or a mixed crystal of Si or Ge, or Al in GaAs. Alternatively the semi-conductor may contain a normally active impurity introduced in such a concentration and in such a way that a proportion of the atoms act as neutral impurities. Crystal dislocations produced by electron bombardment may also be used as neutral impurities. The resistor may be integrated in a wafer together with other devices such as transistors. In a first method an N-type Si wafer is provided with an oxide mask exposing a strip which is to form the resistor with an enlarged contact region at each end. Sn is diffused into the exposed area from the gas phase followed by a drive-in step. Boron is then diffused-in to form a P-type region. The wafer is then reoxidized, the contact regions are exposed and are provided with Al contacts to which conductors may be connected. In a second method an N-type Si wafer is provided with an oxide mask exposing contact areas for the resistor. B is diffused-in to form the contact regions and the resistor strip is exposed. Al is vapour deposited and processed to form contacts to the major portions of the contact regions. Ga69 is then introduced into the resistor strip and also the non-contacted parts of the contact regions by ion implantation. The wafer is then annealed. A proportion of the implanted ions act as active impurities to provide the current carriers and the remainder act as neutral impurities. In a modification, after deposition of the Al layer the resistor strip is exposed by etching away the Al and oxide layers. Ga is then ion-implanted and the excess Al is etched away leaving the contact lands. In a further method an N-type Si wafer is provided with an oxide mask exposing contact lands for the resistor. B is diffused-in to form the contact regions, the oxide layer is removed and the wafer is reoxidized. Smaller apertures are formed in the oxide layer over the contact regions, Al is vapour deposited and the resistor strip is etched in the Al layer only. B11 ions are then implanted through the oxide layer to form the resistor, the Al layer acting as a mask. The excess Al is then etched away leaving contact lands and the wafer is annealed.