FR2396418A1 - INTEGRATED SEMICONDUCTOR DEVICE WHOSE CHARACTERISTICS ARE NOT AFFECTED BY THE ENCAPSULATION - Google Patents
INTEGRATED SEMICONDUCTOR DEVICE WHOSE CHARACTERISTICS ARE NOT AFFECTED BY THE ENCAPSULATIONInfo
- Publication number
- FR2396418A1 FR2396418A1 FR7819525A FR7819525A FR2396418A1 FR 2396418 A1 FR2396418 A1 FR 2396418A1 FR 7819525 A FR7819525 A FR 7819525A FR 7819525 A FR7819525 A FR 7819525A FR 2396418 A1 FR2396418 A1 FR 2396418A1
- Authority
- FR
- France
- Prior art keywords
- encapsulation
- semiconductor device
- affected
- device whose
- integrated semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005538 encapsulation Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/8605—Resistors with PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
L'invention concerne un dispositif à semi-conducteurs. Celui-ci comporte une couche résistante à conductivité de type p 12a et 12b qui est formée dans la surface principale de la face 511 ou 811 d'un substrat de silicium 11. La couche résistante possède des électrodes 17 à ses extrémités et est orientée suivant un axe cristallin écarté de 45 degrés par rapport à l'axe 011 afin de laisser passer du courant suivant son axe cristallin. Les caractéristiques électriques du dispositif de l'invention ne sont pas altérées par les contraintes mécaniques résultant de son encapsulage.A semiconductor device is disclosed. This comprises a p-type conductivity resistive layer 12a and 12b which is formed in the main surface of the face 511 or 811 of a silicon substrate 11. The resistive layer has electrodes 17 at its ends and is oriented along a crystalline axis spaced 45 degrees from the axis 011 in order to allow current to pass along its crystalline axis. The electrical characteristics of the device of the invention are not altered by the mechanical stresses resulting from its encapsulation.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7662177A JPS5412576A (en) | 1977-06-29 | 1977-06-29 | Semiconductor device |
JP8359277A JPS5419379A (en) | 1977-07-14 | 1977-07-14 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2396418A1 true FR2396418A1 (en) | 1979-01-26 |
FR2396418B1 FR2396418B1 (en) | 1985-02-15 |
Family
ID=26417758
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7819525A Granted FR2396418A1 (en) | 1977-06-29 | 1978-06-29 | INTEGRATED SEMICONDUCTOR DEVICE WHOSE CHARACTERISTICS ARE NOT AFFECTED BY THE ENCAPSULATION |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE2828607C3 (en) |
FR (1) | FR2396418A1 (en) |
GB (1) | GB2000638B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56122134A (en) * | 1980-02-29 | 1981-09-25 | Toshiba Corp | Resin-sealed type semiconductor device |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1951986A1 (en) * | 1968-10-15 | 1970-04-16 | Tokyo Shibaura Electric Co | Semiconductor arrangement |
FR2230083A1 (en) * | 1973-05-18 | 1974-12-13 | Philips Nv | |
FR2396417A1 (en) * | 1977-06-29 | 1979-01-26 | Tokyo Shibaura Electric Co | SEMICONDUCTOR COMPONENT INCLUDING A RESISTOR |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1465112A1 (en) * | 1963-10-04 | 1969-01-23 | Anritsu Electric Company Ltd | Semiconductor layers deposited in a vacuum for elasto resistance elements |
NL154867B (en) * | 1964-02-13 | 1977-10-17 | Hitachi Ltd | PROCESS FOR THE MANUFACTURE OF A SEMICONDUCTOR DEVICE AS WELL AS MADE IN ACCORDANCE WITH THIS PROCEDURE, FIELD EFFECT TRANSISTOR AND PLANAR TRANSISTOR. |
GB1249317A (en) * | 1968-11-19 | 1971-10-13 | Mullard Ltd | Semiconductor devices |
US3965453A (en) * | 1974-12-27 | 1976-06-22 | Bell Telephone Laboratories, Incorporated | Piezoresistor effects in semiconductor resistors |
-
1978
- 1978-06-29 GB GB7828265A patent/GB2000638B/en not_active Expired
- 1978-06-29 DE DE2828607A patent/DE2828607C3/en not_active Expired
- 1978-06-29 FR FR7819525A patent/FR2396418A1/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1951986A1 (en) * | 1968-10-15 | 1970-04-16 | Tokyo Shibaura Electric Co | Semiconductor arrangement |
FR2230083A1 (en) * | 1973-05-18 | 1974-12-13 | Philips Nv | |
FR2396417A1 (en) * | 1977-06-29 | 1979-01-26 | Tokyo Shibaura Electric Co | SEMICONDUCTOR COMPONENT INCLUDING A RESISTOR |
Non-Patent Citations (2)
Title |
---|
EXBK/66 * |
EXBK/77 * |
Also Published As
Publication number | Publication date |
---|---|
DE2828607A1 (en) | 1979-01-04 |
GB2000638B (en) | 1982-01-20 |
DE2828607C3 (en) | 1982-08-12 |
FR2396418B1 (en) | 1985-02-15 |
DE2828607B2 (en) | 1981-02-05 |
GB2000638A (en) | 1979-01-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name | ||
ST | Notification of lapse |