ES2149454T3 - Procedimiento para conectar una conexion electrica de un componente de circuito impreso no empaquetado con una banda conductora sobre un substrato. - Google Patents

Procedimiento para conectar una conexion electrica de un componente de circuito impreso no empaquetado con una banda conductora sobre un substrato.

Info

Publication number
ES2149454T3
ES2149454T3 ES96905709T ES96905709T ES2149454T3 ES 2149454 T3 ES2149454 T3 ES 2149454T3 ES 96905709 T ES96905709 T ES 96905709T ES 96905709 T ES96905709 T ES 96905709T ES 2149454 T3 ES2149454 T3 ES 2149454T3
Authority
ES
Spain
Prior art keywords
electrical connection
packaged
procedure
substrate
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES96905709T
Other languages
English (en)
Spanish (es)
Inventor
Werner Grunwald
Ralf Haug
Martin Seyffert
Frank-Dieter Hauschild
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Application granted granted Critical
Publication of ES2149454T3 publication Critical patent/ES2149454T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07231Techniques
    • H10W72/07236Soldering or alloying
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S29/00Metal working
    • Y10S29/012Method or apparatus with electroplating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
ES96905709T 1995-05-20 1996-03-12 Procedimiento para conectar una conexion electrica de un componente de circuito impreso no empaquetado con una banda conductora sobre un substrato. Expired - Lifetime ES2149454T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19518659A DE19518659A1 (de) 1995-05-20 1995-05-20 Verfahren zum Verbinden eines elektrischen Anschlußes eines unverpackten IC-Bauelements mit einer Leiterbahn auf einem Substrat

Publications (1)

Publication Number Publication Date
ES2149454T3 true ES2149454T3 (es) 2000-11-01

Family

ID=7762506

Family Applications (1)

Application Number Title Priority Date Filing Date
ES96905709T Expired - Lifetime ES2149454T3 (es) 1995-05-20 1996-03-12 Procedimiento para conectar una conexion electrica de un componente de circuito impreso no empaquetado con una banda conductora sobre un substrato.

Country Status (8)

Country Link
US (1) US5784779A (https=)
EP (1) EP0771472B1 (https=)
JP (1) JPH10503331A (https=)
KR (1) KR970705171A (https=)
DE (2) DE19518659A1 (https=)
ES (1) ES2149454T3 (https=)
TW (1) TW297937B (https=)
WO (1) WO1996036991A1 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU4688699A (en) * 1998-06-22 2000-01-10 Loctite Corporation Thermosetting resin compositions useful as underfill sealants
US20020104576A1 (en) * 2000-08-30 2002-08-08 Howland Charles A. Multi-layer and laminate fabric systems
US7626262B2 (en) * 2006-06-14 2009-12-01 Infineon Technologies Ag Electrically conductive connection, electronic component and method for their production

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3811186A (en) * 1972-12-11 1974-05-21 Ibm Method of aligning and attaching circuit devices on a substrate
JPS5586130A (en) * 1978-12-25 1980-06-28 Hitachi Ltd Connection of semiconductor element
US4642889A (en) * 1985-04-29 1987-02-17 Amp Incorporated Compliant interconnection and method therefor
DE3843984A1 (de) * 1988-12-27 1990-07-05 Asea Brown Boveri Verfahren zum loeten eines drahtlosen bauelementes sowie leiterplatte mit angeloetetem, drahtlosem bauelement
JP2709499B2 (ja) * 1989-02-25 1998-02-04 新日本製鐵株式会社 半導体素子接続構造
US5068714A (en) * 1989-04-05 1991-11-26 Robert Bosch Gmbh Method of electrically and mechanically connecting a semiconductor to a substrate using an electrically conductive tacky adhesive and the device so made
JP2657429B2 (ja) * 1990-04-09 1997-09-24 株式会社ミクロ技術研究所 基板の回路実装方法及びその方法に使用する回路基板
DE4020048A1 (de) * 1990-06-23 1992-01-02 Ant Nachrichtentech Anordnung aus substrat und bauelement und verfahren zur herstellung
US5086558A (en) * 1990-09-13 1992-02-11 International Business Machines Corporation Direct attachment of semiconductor chips to a substrate with a substrate with a thermoplastic interposer
JP2756184B2 (ja) * 1990-11-27 1998-05-25 株式会社日立製作所 電子部品の表面実装構造
US5056215A (en) * 1990-12-10 1991-10-15 Delco Electronics Corporation Method of providing standoff pillars
JP2940269B2 (ja) * 1990-12-26 1999-08-25 日本電気株式会社 集積回路素子の接続方法
JPH04320089A (ja) * 1991-04-18 1992-11-10 Cmk Corp プリント配線板の製造方法
US5203075A (en) * 1991-08-12 1993-04-20 Inernational Business Machines Method of bonding flexible circuit to cicuitized substrate to provide electrical connection therebetween using different solders
US5245750A (en) * 1992-02-28 1993-09-21 Hughes Aircraft Company Method of connecting a spaced ic chip to a conductor and the article thereby obtained
DE4227085A1 (de) * 1992-08-17 1994-02-24 Bosch Gmbh Robert Verfahren zur Herstellung fein strukturierter elektrisch leitfähiger Schichten
US5386624A (en) * 1993-07-06 1995-02-07 Motorola, Inc. Method for underencapsulating components on circuit supporting substrates

Also Published As

Publication number Publication date
DE19518659A1 (de) 1996-11-21
EP0771472A1 (de) 1997-05-07
JPH10503331A (ja) 1998-03-24
WO1996036991A1 (de) 1996-11-21
KR970705171A (ko) 1997-09-06
US5784779A (en) 1998-07-28
TW297937B (https=) 1997-02-11
EP0771472B1 (de) 2000-07-26
DE59605642D1 (de) 2000-08-31

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