ES2110412T3 - Compensacion de los efectos de proximidad litograficos y de grabado al aguafuerte. - Google Patents

Compensacion de los efectos de proximidad litograficos y de grabado al aguafuerte.

Info

Publication number
ES2110412T3
ES2110412T3 ES90310242T ES90310242T ES2110412T3 ES 2110412 T3 ES2110412 T3 ES 2110412T3 ES 90310242 T ES90310242 T ES 90310242T ES 90310242 T ES90310242 T ES 90310242T ES 2110412 T3 ES2110412 T3 ES 2110412T3
Authority
ES
Spain
Prior art keywords
engraving
model
attachment
compensation
effects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90310242T
Other languages
English (en)
Inventor
Juli Hong Eisenberg
Larry Bruce Fritzinger
Chong-Cheng Fu
Taeho Kook
Thomas Michael Wolf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of ES2110412T3 publication Critical patent/ES2110412T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/941—Loading effect mitigation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Drying Of Semiconductors (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Manufacture Or Reproduction Of Printing Formes (AREA)

Abstract

EN LA FABRICACION DE DISPOSITIVOS INTEGRADOS, SE EFECTUAN CARACTERISTICAS CON DISEÑO EN UN SUSTRATO GRABANDO AL AGUAFUERTE UNA CAPA DEPOSITADA. EL MODELO COMPRENDE CARACTERISTICAS QUE ESTAN SEPARADAS LIGERAMENTE Y OTRAS MAS AISLADAS. GRABAR AL AGUAFUERTE ESTA EN CONFORMIDAD APROXIMADA CON UN MODELO PROTECTOR DEFINIDO LITOGRAFICAMENTE QUE A SU VEZ ESTA EN APROXIMADA CONFORMIDAD CON UN MODELO DESEADO. SE ELIGE UN PARAMETRO DE PROCESO, TAL COMO EL GROSOR DE LA CAPA PROTECTORA PARA QUE EL MODELO GRABADO QUE SE OBTIENE SE APROXIMA MAS AL PATRON DESEADO QUE A UN MODELO PROTECTOR DEFINIDO LITOGRAFICAMENTE.
ES90310242T 1989-09-27 1990-09-19 Compensacion de los efectos de proximidad litograficos y de grabado al aguafuerte. Expired - Lifetime ES2110412T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/413,356 US5057462A (en) 1989-09-27 1989-09-27 Compensation of lithographic and etch proximity effects

Publications (1)

Publication Number Publication Date
ES2110412T3 true ES2110412T3 (es) 1998-02-16

Family

ID=23636923

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90310242T Expired - Lifetime ES2110412T3 (es) 1989-09-27 1990-09-19 Compensacion de los efectos de proximidad litograficos y de grabado al aguafuerte.

Country Status (5)

Country Link
US (1) US5057462A (es)
EP (1) EP0420489B1 (es)
JP (1) JPH0799431B2 (es)
DE (1) DE69031856T2 (es)
ES (1) ES2110412T3 (es)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930008866B1 (ko) * 1990-04-20 1993-09-16 가부시키가이샤 도시바 반도체장치 및 그 제조방법
JPH04212472A (ja) * 1990-07-13 1992-08-04 Toshiba Corp 不揮発性半導体記憶装置の製造方法
US5710711A (en) * 1992-10-21 1998-01-20 Lucent Technologies Inc. Method and integrated circuit adapted for partial scan testability
US5656509A (en) * 1995-05-10 1997-08-12 Advanced Micro Devices, Inc. Method and test structure for determining gouging in a flash EPROM cell during SAS etch
KR0172561B1 (ko) * 1995-06-23 1999-03-30 김주용 노강 마스크의 근접 효과 억제방법
KR0160924B1 (ko) * 1995-06-30 1998-12-15 김주용 노광 마스크
US6653733B1 (en) * 1996-02-23 2003-11-25 Micron Technology, Inc. Conductors in semiconductor devices
US6143663A (en) * 1998-01-22 2000-11-07 Cypress Semiconductor Corporation Employing deionized water and an abrasive surface to polish a semiconductor topography
US6200896B1 (en) 1998-01-22 2001-03-13 Cypress Semiconductor Corporation Employing an acidic liquid and an abrasive surface to polish a semiconductor topography
US5858591A (en) * 1998-02-02 1999-01-12 Taiwan Semiconductor Manufacturing Company Ltd. Optical proximity correction during wafer processing through subfile bias modification with subsequent subfile merging
US6171180B1 (en) 1998-03-31 2001-01-09 Cypress Semiconductor Corporation Planarizing a trench dielectric having an upper surface within a trench spaced below an adjacent polish stop surface
US6534378B1 (en) 1998-08-31 2003-03-18 Cypress Semiconductor Corp. Method for forming an integrated circuit device
US5972124A (en) * 1998-08-31 1999-10-26 Advanced Micro Devices, Inc. Method for cleaning a surface of a dielectric material
US6232231B1 (en) 1998-08-31 2001-05-15 Cypress Semiconductor Corporation Planarized semiconductor interconnect topography and method for polishing a metal layer to form interconnect
US6566249B1 (en) 1998-11-09 2003-05-20 Cypress Semiconductor Corp. Planarized semiconductor interconnect topography and method for polishing a metal layer to form wide interconnect structures
US6596466B1 (en) 2000-01-25 2003-07-22 Cypress Semiconductor Corporation Contact structure and method of forming a contact structure
US6265120B1 (en) 2000-02-01 2001-07-24 Taiwan Semiconductor Manufacturing Company Geometry design of active region to improve junction breakdown and field isolation in STI process
DE10013995A1 (de) * 2000-03-22 2001-09-27 Chemagen Biopolymer Technologi Magnetische, silanisierte Trägermaterialien auf Basis von Polyvinylalkohol
US6555895B1 (en) 2000-07-17 2003-04-29 General Semiconductor, Inc. Devices and methods for addressing optical edge effects in connection with etched trenches
US6969684B1 (en) 2001-04-30 2005-11-29 Cypress Semiconductor Corp. Method of making a planarized semiconductor structure
US6828678B1 (en) 2002-03-29 2004-12-07 Silicon Magnetic Systems Semiconductor topography with a fill material arranged within a plurality of valleys associated with the surface roughness of the metal layer
US7897008B2 (en) * 2006-10-27 2011-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for regional plasma control
JP4511582B2 (ja) * 2007-11-07 2010-07-28 シャープ株式会社 マスクパターンの補正方法、フォトマスク、および半導体装置の製造方法
US8387674B2 (en) 2007-11-30 2013-03-05 Taiwan Semiconductor Manufacturing Comany, Ltd. Chip on wafer bonder
US8003545B2 (en) * 2008-02-14 2011-08-23 Spansion Llc Method of forming an electronic device including forming features within a mask and a selective removal process
US8178280B2 (en) * 2010-02-05 2012-05-15 Taiwan Semiconductor Manufacturing Company, Ltd. Self-contained proximity effect correction inspiration for advanced lithography (special)
CN111982883B (zh) * 2020-09-02 2023-04-14 鲁东大学 一种石墨烯/银十六角星阵列拉曼增强基底及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4463265A (en) * 1982-06-17 1984-07-31 Hewlett-Packard Company Electron beam proximity effect correction by reverse field pattern exposure
US4610948A (en) * 1984-01-25 1986-09-09 The United States Of America As Represented By The Secretary Of The Army Electron beam peripheral patterning of integrated circuits
US4761560A (en) * 1984-01-25 1988-08-02 The United States Of America As Represented By The Secretary Of The Army Measurement of proximity effects in electron beam lithography
JPS63208049A (ja) * 1987-02-24 1988-08-29 Nec Corp 半導体製造用マスクの製造方法およびその装置

Also Published As

Publication number Publication date
JPH0799431B2 (ja) 1995-10-25
EP0420489A3 (en) 1992-04-15
US5057462A (en) 1991-10-15
EP0420489A2 (en) 1991-04-03
EP0420489B1 (en) 1997-12-29
DE69031856D1 (de) 1998-02-05
JPH03170929A (ja) 1991-07-24
DE69031856T2 (de) 1998-04-16

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